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A Novel HDL Code Generator for Effectively Testing FPGA Logic Synthesis Compilers

Fuente: arXiv

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Détails bibliographiques
Auteurs principaux:	Xu, Zhihao, Guo, Shikai, Zhao, Guilin, Zou, Peiyu, Li, Xiaochen, Jiang, He
Format:	Preprint
Publié:	2024
Sujets:	Hardware Architecture Software Engineering
Accès en ligne:	Acceder al recurso
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