Cover Image

Highly Efficient Parallel Row-Layered Min-Sum MDPC Decoder for McEliece Cryptosystem

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Cai, Jiaxuan, Zhang, Xinmiao
Format:	Preprint
Published:	2024
Subjects:	Cryptography and Security Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Efficient Layered New Bit-Flipping QC-MDPC Decoder for BIKE Post-Quantum Cryptography
by: Cai, Jiaxuan, et al.
Published: (2024)

Low-Complexity Integer Divider Architecture for Homomorphic Encryption
by: Akherati, Sajjad, et al.
Published: (2024)

CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost
by: Bostanci, F. Nisa, et al.
Published: (2024)

PQCMC: Post-Quantum Cryptography McEliece-Chen Implicit Certificate Scheme
by: Chen, Abel C. H.
Published: (2024)

An Experimental Characterization of Combined RowHammer and RowPress Read Disturbance in Modern DRAM Chips
by: Luo, Haocong, et al.
Published: (2024)

Three-Input Ciphertext Multiplication for Homomorphic Encryption
by: Akherati, Sajjad, et al.
Published: (2024)

High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography
by: Tan, Weihang, et al.
Published: (2021)

RowPress Vulnerability in Modern DRAM Chips
by: Luo, Haocong, et al.
Published: (2024)

MOAT: Securely Mitigating Rowhammer with Per-Row Activation Counters
by: Qureshi, Moinuddin, et al.
Published: (2024)

RowPress: Amplifying Read Disturbance in Modern DRAM Chips
by: Luo, Haocong, et al.
Published: (2023)

DRAM-Profiler: An Experimental DRAM RowHammer Vulnerability Profiling Mechanism
by: Zhou, Ranyang, et al.
Published: (2024)

Per-Row Activation Counting on Real Hardware: Demystifying Performance Overheads
by: Kim, Jumin, et al.
Published: (2025)

HammerSim: A System-Level Tool to Model RowHammer
by: Goswami, Kaustav, et al.
Published: (2026)

BreakHammer: Enhancing RowHammer Mitigations by Carefully Throttling Suspect Threads
by: Canpolat, Oğuzhan, et al.
Published: (2024)

Understanding and Mitigating Covert Channel and Side Channel Vulnerabilities Introduced by RowHammer Defenses
by: Bostancı, F. Nisa, et al.
Published: (2025)

ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation
by: Olgun, Ataberk, et al.
Published: (2023)

PVAC: A RowHammer Mitigation Architecture Exploiting Per-victim-row Counting
by: Kim, Jumin, et al.
Published: (2026)

SpyHammer: Understanding and Exploiting RowHammer under Fine-Grained Temperature Variations
by: Orosa, Lois, et al.
Published: (2022)

DSAC: Low-Cost RowHammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm
by: Hong, Seungki, et al.
Published: (2023)

ImPress: Securing DRAM Against Data-Disturbance Errors via Implicit Row-Press Mitigation
by: Qureshi, Moinuddin, et al.
Published: (2024)

SoK: Systematizing a Decade of Architectural RowHammer Defenses Through the Lens of Streaming Algorithms
by: Kim, Michael Jaemin, et al.
Published: (2025)

Securing DRAM at Scale: ARFM-Driven Row Hammer Defense with Unveiling the Threat of Short tRC Patterns
by: Joo, Nogeun, et al.
Published: (2025)

Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
by: Tuğrul, Yahya Can, et al.
Published: (2025)

GPU Acceleration of TFHE-Based High-Precision Nonlinear Layers for Encrypted LLM Inference
by: Chen, Guoci, et al.
Published: (2026)

EFFACT: A Highly Efficient Full-Stack FHE Acceleration Platform
by: Huang, Yi, et al.
Published: (2025)

A High Performance and Efficient Post-Quantum Crypto-Processor for FrodoKEM
by: Li, Kai, et al.
Published: (2026)

PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption
by: Tan, Weihang, et al.
Published: (2023)

CryptoSRAM: Enabling High-Throughput Cryptography on MCUs via In-SRAM Computing
by: Zhang, Jingyao, et al.
Published: (2025)

Teapot: Efficiently Uncovering Spectre Gadgets in COTS Binaries
by: Lin, Fangzheng, et al.
Published: (2024)

Efficient and Lightweight In-memory Computing Architecture for Hardware Security
by: Ajmi, Hala, et al.
Published: (2022)

PoisonCap: Efficient Hierarchical Temporal Safety for CHERI
by: Wang, Yuecheng, et al.
Published: (2026)

Okapi: Efficiently Safeguarding Speculative Data Accesses in Sandboxed Environments
by: Schmitz, Philipp, et al.
Published: (2023)

Implementation and Optimization of HQC Decoding on NPU-Integrated Devices
by: Chau, Vu Minh, et al.
Published: (2026)

Cassandra: Efficient Enforcement of Sequential Execution for Cryptographic Programs (Extended Version)
by: Hajiabadi, Ali, et al.
Published: (2024)

SEA Cache: A Performance-Efficient Countermeasure for Contention-based Attacks
by: Liu, Xiao, et al.
Published: (2024)

Efficient Implementation of CRYSTALS-KYBER Key Encapsulation Mechanism on ESP32
by: Segatz, Fabian, et al.
Published: (2025)

An Efficient Algorithm for Modulus Operation and Its Hardware Implementation in Prime Number Calculation
by: Wijesinghe, W. A. Susantha
Published: (2024)

Efficient Hardware Implementation of Modular Multiplier over GF (2m) on FPGA
by: Kumari, Ruby, et al.
Published: (2025)

SMaCk: Efficient Instruction Cache Attacks via Self-Modifying Code Conflicts
by: Son, Seonghun, et al.
Published: (2025)

SAILOR: A Scalable and Energy-Efficient Ultra-Lightweight RISC-V for IoT Security
by: Ewert, Christian, et al.
Published: (2026)