Integrated Hardware Architecture and Device Placement Search

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Wang, Irene, Tarnawski, Jakub, Phanishayee, Amar, Mahajan, Divya
Format:	Preprint
Published:	2024
Subjects:	Machine Learning Hardware Architecture Distributed, Parallel, and Cluster Computing
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Workload-Aware Hardware Accelerator Mining for Distributed Deep Learning Training
by: Adnan, Muhammad, et al.
Published: (2024)

A Survey on Graph Neural Network Acceleration: Algorithms, Systems, and Customized Hardware
by: Zhang, Shichang, et al.
Published: (2023)

SPAD: Specialized Prefill and Decode Hardware for Disaggregated LLM Inference
by: Zhang, Hengrui, et al.
Published: (2025)

Accelerating Transposed Convolutions on FPGA-based Edge Devices
by: Haris, Jude, et al.
Published: (2025)

INR-Arch: A Dataflow Architecture and Compiler for Arbitrary-Order Gradient Computations in Implicit Neural Representation Processing
by: Abi-Karam, Stefan, et al.
Published: (2023)

A High Energy-Efficiency Multi-core Neuromorphic Architecture for Deep SNN Training
by: Li, Mingjing, et al.
Published: (2024)

ZipServ: Fast and Memory-Efficient LLM Inference with Hardware-Aware Lossless Compression
by: Fan, Ruibo, et al.
Published: (2026)

Detecting Anomalies in Machine Learning Infrastructure via Hardware Telemetry
by: Chen, Ziji, et al.
Published: (2025)

PIUMA: Programmable Integrated Unified Memory Architecture
by: Aananthakrishnan, Sriram, et al.
Published: (2020)

Sustainable AI Training via Hardware-Software Co-Design on NVIDIA, AMD, and Emerging GPU Architectures
by: Makin, Yashasvi, et al.
Published: (2025)

Balanced Data Placement for GEMV Acceleration with Processing-In-Memory
by: Ibrahim, Mohamed Assem, et al.
Published: (2024)

Optimizing Attention on GPUs by Exploiting GPU Architectural NUMA Effects
by: Choudhary, Mansi, et al.
Published: (2025)

CCSS: Hardware-Accelerated RTL Simulation with Fast Combinational Logic Computing and Sequential Logic Synchronization
by: Feng, Weigang, et al.
Published: (2025)

DCC: Data-Centric Compilation of Machine Learning Kernels for Processing-In-Memory Architectures
by: Yang, Peiming, et al.
Published: (2025)

FastGL: A GPU-Efficient Framework for Accelerating Sampling-Based GNN Training at Large Scale
by: Zhu, Zeyu, et al.
Published: (2024)

PyGim: An Efficient Graph Neural Network Library for Real Processing-In-Memory Architectures
by: Giannoula, Christina, et al.
Published: (2024)

LayerDAG: A Layerwise Autoregressive Diffusion Model for Directed Acyclic Graph Generation
by: Li, Mufei, et al.
Published: (2024)

Switchboard: An Open-Source Framework for Modular Simulation of Large Hardware Systems
by: Herbst, Steven, et al.
Published: (2024)

Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction Trees
by: Orenes-Vera, Marcelo, et al.
Published: (2023)

MLDSE: Scaling Design Space Exploration Infrastructure for Multi-Level Hardware
by: Qu, Huanyu, et al.
Published: (2025)

Hierarchical Resource Partitioning on Modern GPUs: A Reinforcement Learning Approach
by: Saroliya, Urvij, et al.
Published: (2024)

Llumnix: Dynamic Scheduling for Large Language Model Serving
by: Sun, Biao, et al.
Published: (2024)

Deep Reinforcement Learning based Online Scheduling Policy for Deep Neural Network Multi-Tenant Multi-Accelerator Systems
by: Blanco, Francesco G., et al.
Published: (2024)

MLPerf Power: Benchmarking the Energy Efficiency of Machine Learning Systems from Microwatts to Megawatts for Sustainable AI
by: Tschand, Arya, et al.
Published: (2024)

AI and Memory Wall
by: Gholami, Amir, et al.
Published: (2024)

Toward Cross-Layer Energy Optimizations in AI Systems
by: Chung, Jae-Won, et al.
Published: (2024)

The Feasibility of Implementing Large-Scale Transformers on Multi-FPGA Platforms
by: Gao, Yu, et al.
Published: (2024)

Performance Modeling and Workload Analysis of Distributed Large Language Model Training and Inference
by: Kundu, Joyjit, et al.
Published: (2024)

Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning
by: Russo, Enrico, et al.
Published: (2024)

Efficient, VRAM-Constrained xLM Inference on Clients
by: Ukarande, Aditya, et al.
Published: (2026)

Accelerating Recommender Model ETL with a Streaming FPGA-GPU Dataflow
by: Zhu, Yu, et al.
Published: (2025)

FlashMoE: Fast Distributed MoE in a Single Kernel
by: Aimuyo, Osayamen Jonathan, et al.
Published: (2025)

ELK: Exploring the Efficiency of Inter-core Connected AI Chips with Deep Learning Compiler Techniques
by: Liu, Yiqi, et al.
Published: (2025)

Observation, Not Prediction: Conversation-Level Disaggregated Scheduling for Agentic Serving
by: Ding, Jianru, et al.
Published: (2026)

F-BFQ: Flexible Block Floating-Point Quantization Accelerator for LLMs
by: Haris, Jude, et al.
Published: (2025)

WWW: What, When, Where to Compute-in-Memory
by: Sharma, Tanvi, et al.
Published: (2023)

MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs
by: Russo, Enrico, et al.
Published: (2026)

FedUHD: Unsupervised Federated Learning using Hyperdimensional Computing
by: Lee, You Hak, et al.
Published: (2025)

MAD Max Beyond Single-Node: Enabling Large Machine Learning Model Acceleration on Distributed Systems
by: Hsia, Samuel, et al.
Published: (2023)

Design Space Exploration of DMA based Finer-Grain Compute Communication Overlap
by: Pal, Shagnik, et al.
Published: (2025)