The Bicameral Cache: a split cache for vector architectures
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arXiv
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| Hauptverfasser: | , , , |
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| Format: | Preprint |
| Veröffentlicht: |
2024
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| _version_ | 1866915214568456192 |
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| author | Rebolledo, Susana Perez, Borja Bosque, Jose Luis Hsu, Peter |
| author_facet | Rebolledo, Susana Perez, Borja Bosque, Jose Luis Hsu, Peter |
| contents | The Bicameral Cache is a cache organization proposal for a vector architecture that segregates data according to their access type, distinguishing scalar from vector references. Its aim is to avoid both types of references from interfering in each other's data locality, with a special focus on prioritizing the performance on vector references. The proposed system incorporates an additional, non-polluting prefetching mechanism to help populate the long vector cache lines in advance to increase the hit rate by further exploiting the spatial locality on vector data. Its evaluation was conducted on the Cavatools simulator, comparing the performance to a standard conventional cache, over different typical vector benchmarks for several vector lengths. The results proved the proposed cache speeds up performance on stride-1 vector benchmarks, while hardly impacting non-stride-1's. In addition, the prefetching feature consistently provided an additional value. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2407_15440 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | The Bicameral Cache: a split cache for vector architectures Rebolledo, Susana Perez, Borja Bosque, Jose Luis Hsu, Peter Hardware Architecture Performance The Bicameral Cache is a cache organization proposal for a vector architecture that segregates data according to their access type, distinguishing scalar from vector references. Its aim is to avoid both types of references from interfering in each other's data locality, with a special focus on prioritizing the performance on vector references. The proposed system incorporates an additional, non-polluting prefetching mechanism to help populate the long vector cache lines in advance to increase the hit rate by further exploiting the spatial locality on vector data. Its evaluation was conducted on the Cavatools simulator, comparing the performance to a standard conventional cache, over different typical vector benchmarks for several vector lengths. The results proved the proposed cache speeds up performance on stride-1 vector benchmarks, while hardly impacting non-stride-1's. In addition, the prefetching feature consistently provided an additional value. |
| title | The Bicameral Cache: a split cache for vector architectures |
| topic | Hardware Architecture Performance |
| url | https://arxiv.org/abs/2407.15440 |