Large Language Model for Verilog Generation with Code-Structure-Guided Reinforcement Learning

Fuente: arXiv

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Bibliographic Details
Main Authors:	Wang, Ning, Yao, Bingkun, Zhou, Jie, Wang, Xi, Jiang, Zhe, Guan, Nan
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture Artificial Intelligence
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2407.18271