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Large Language Model for Verilog Generation with Code-Structure-Guided Reinforcement Learning

Fuente: arXiv

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Détails bibliographiques
Auteurs principaux:	Wang, Ning, Yao, Bingkun, Zhou, Jie, Wang, Xi, Jiang, Zhe, Guan, Nan
Format:	Preprint
Publié:	2024
Sujets:	Hardware Architecture Artificial Intelligence
Accès en ligne:	Acceder al recurso
Tags:	Ajouter un tag Pas de tags, Soyez le premier à ajouter un tag!

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