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AutoVCoder: A Systematic Framework for Automated Verilog Code Generation using LLMs

Fuente: arXiv

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Bibliographic Details
Main Authors:	Gao, Mingzhe, Zhao, Jieru, Lin, Zhe, Ding, Wenchao, Hou, Xiaofeng, Feng, Yu, Li, Chao, Guo, Minyi
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture Artificial Intelligence
Online Access:	Acceder al recurso
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