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| Formato: | Preprint |
| Publicado: |
2024
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| Materias: | |
| Acceso en línea: | https://arxiv.org/abs/2407.18528 |
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| author | Rinella, Gianluca Aglieri Aglietta, Luca Antonelli, Matias Barile, Francesco Benotto, Franco Beolè, Stefania Maria Botta, Elena Bruno, Giuseppe Eugenio Carnesecchi, Francesca Colella, Domenico Colelli, Angelo Contin, Giacomo De Robertis, Giuseppe Dumitrache, Florina Elia, Domenico Ferrero, Chiara Fransen, Martin Kluge, Alex Kumar, Shyam Lemoine, Corentin Licciulli, Francesco Lim, Bong-Hwi Loddo, Flavio Mager, Magnus Marras, Davide Martinengo, Paolo Pastore, Cosimo Patra, Rajendra Nath Perciballi, Stefania Piro, Francesco Prino, Francesco Ramello, Luciano Ramos, Arianna Grisel Torres Reidt, Felix Russo, Roberto Sarritzu, Valerio Savino, Umberto Schledewitz, David Selina, Mariia Senyukov, Serhiy Sitta, Mario Snoeys, Walter Sonneveld, Jory Suljic, Miljenko Triloki, Triloki Turcato, Andrea |
| author_facet | Rinella, Gianluca Aglieri Aglietta, Luca Antonelli, Matias Barile, Francesco Benotto, Franco Beolè, Stefania Maria Botta, Elena Bruno, Giuseppe Eugenio Carnesecchi, Francesca Colella, Domenico Colelli, Angelo Contin, Giacomo De Robertis, Giuseppe Dumitrache, Florina Elia, Domenico Ferrero, Chiara Fransen, Martin Kluge, Alex Kumar, Shyam Lemoine, Corentin Licciulli, Francesco Lim, Bong-Hwi Loddo, Flavio Mager, Magnus Marras, Davide Martinengo, Paolo Pastore, Cosimo Patra, Rajendra Nath Perciballi, Stefania Piro, Francesco Prino, Francesco Ramello, Luciano Ramos, Arianna Grisel Torres Reidt, Felix Russo, Roberto Sarritzu, Valerio Savino, Umberto Schledewitz, David Selina, Mariia Senyukov, Serhiy Sitta, Mario Snoeys, Walter Sonneveld, Jory Suljic, Miljenko Triloki, Triloki Turcato, Andrea |
| contents | In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An Analog Pixel Test Structure (APTS) featuring fast per pixel operational-amplifier-based buffering for a small matrix of four by four pixels, with a sensor with a small collection electrode and a very non-uniform electric field, was designed to allow detailed characterization of the pixel performance in this technology. Several variants of this chip with different pixel designs have been characterized with a (120 GeV/$c$) positive hadron beam. This result indicates that the APTS-OA prototype variants with the best performance achieve a time resolution of 63 ps with a detection efficiency exceeding 99% and a spatial resolution of 2 $μ$m, highlighting the potential of TPSCo 65nm CMOS imaging technology for high-energy physics and other fields requiring precise time measurement, high detection efficiency, and excellent spatial resolution. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2407_18528 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Time performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process Rinella, Gianluca Aglieri Aglietta, Luca Antonelli, Matias Barile, Francesco Benotto, Franco Beolè, Stefania Maria Botta, Elena Bruno, Giuseppe Eugenio Carnesecchi, Francesca Colella, Domenico Colelli, Angelo Contin, Giacomo De Robertis, Giuseppe Dumitrache, Florina Elia, Domenico Ferrero, Chiara Fransen, Martin Kluge, Alex Kumar, Shyam Lemoine, Corentin Licciulli, Francesco Lim, Bong-Hwi Loddo, Flavio Mager, Magnus Marras, Davide Martinengo, Paolo Pastore, Cosimo Patra, Rajendra Nath Perciballi, Stefania Piro, Francesco Prino, Francesco Ramello, Luciano Ramos, Arianna Grisel Torres Reidt, Felix Russo, Roberto Sarritzu, Valerio Savino, Umberto Schledewitz, David Selina, Mariia Senyukov, Serhiy Sitta, Mario Snoeys, Walter Sonneveld, Jory Suljic, Miljenko Triloki, Triloki Turcato, Andrea Instrumentation and Detectors In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An Analog Pixel Test Structure (APTS) featuring fast per pixel operational-amplifier-based buffering for a small matrix of four by four pixels, with a sensor with a small collection electrode and a very non-uniform electric field, was designed to allow detailed characterization of the pixel performance in this technology. Several variants of this chip with different pixel designs have been characterized with a (120 GeV/$c$) positive hadron beam. This result indicates that the APTS-OA prototype variants with the best performance achieve a time resolution of 63 ps with a detection efficiency exceeding 99% and a spatial resolution of 2 $μ$m, highlighting the potential of TPSCo 65nm CMOS imaging technology for high-energy physics and other fields requiring precise time measurement, high detection efficiency, and excellent spatial resolution. |
| title | Time performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process |
| topic | Instrumentation and Detectors |
| url | https://arxiv.org/abs/2407.18528 |