Obstacle-Aware Length-Matching Routing for Any-Direction Traces in Printed Circuit Board
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arXiv
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| Main Authors: | , , , , , , |
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| Format: | Preprint |
| Published: |
2024
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| _version_ | 1866917735345160192 |
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| author | Fang, Weijie Guo, Longkun Lin, Jiawei Xiong, Silu He, Huan Xu, Jiacen Chen, Jianli |
| author_facet | Fang, Weijie Guo, Longkun Lin, Jiawei Xiong, Silu He, Huan Xu, Jiacen Chen, Jianli |
| contents | Emerging applications in Printed Circuit Board (PCB) routing impose new challenges on automatic length matching, including adaptability for any-direction traces with their original routing preserved for interactiveness. The challenges can be addressed through two orthogonal stages: assign non-overlapping routing regions to each trace and meander the traces within their regions to reach the target length. In this paper, mainly focusing on the meandering stage, we propose an obstacle-aware detailed routing approach to optimize the utilization of available space and achieve length matching while maintaining the original routing of traces. Furthermore, our approach incorporating the proposed Multi-Scale Dynamic Time Warping (MSDTW) method can also handle differential pairs against common decoupled problems. Experimental results demonstrate that our approach has effective length-matching routing ability and compares favorably to previous approaches under more complicated constraints. |
| format | Preprint |
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arxiv_https___arxiv_org_abs_2407_19195 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Obstacle-Aware Length-Matching Routing for Any-Direction Traces in Printed Circuit Board Fang, Weijie Guo, Longkun Lin, Jiawei Xiong, Silu He, Huan Xu, Jiacen Chen, Jianli Hardware Architecture Computational Geometry Data Structures and Algorithms Emerging applications in Printed Circuit Board (PCB) routing impose new challenges on automatic length matching, including adaptability for any-direction traces with their original routing preserved for interactiveness. The challenges can be addressed through two orthogonal stages: assign non-overlapping routing regions to each trace and meander the traces within their regions to reach the target length. In this paper, mainly focusing on the meandering stage, we propose an obstacle-aware detailed routing approach to optimize the utilization of available space and achieve length matching while maintaining the original routing of traces. Furthermore, our approach incorporating the proposed Multi-Scale Dynamic Time Warping (MSDTW) method can also handle differential pairs against common decoupled problems. Experimental results demonstrate that our approach has effective length-matching routing ability and compares favorably to previous approaches under more complicated constraints. |
| title | Obstacle-Aware Length-Matching Routing for Any-Direction Traces in Printed Circuit Board |
| topic | Hardware Architecture Computational Geometry Data Structures and Algorithms |
| url | https://arxiv.org/abs/2407.19195 |