Switchboard: An Open-Source Framework for Modular Simulation of Large Hardware Systems
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arXiv
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| Auteurs principaux: | , , , |
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| Format: | Preprint |
| Publié: |
2024
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| _version_ | 1866914891969855488 |
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| author | Herbst, Steven Moroze, Noah Iglesias, Edgar Olofsson, Andreas |
| author_facet | Herbst, Steven Moroze, Noah Iglesias, Edgar Olofsson, Andreas |
| contents | Scaling up hardware systems has become an important tactic for improving performance as Moore's law fades. Unfortunately, simulations of large hardware systems are often a design bottleneck due to slow throughput and long build times. In this article, we propose a solution targeting designs composed of modular blocks connected by latency-insensitive interfaces. Our approach is to construct the hardware simulation in a similar fashion as the design itself, using a prebuilt simulator for each block and connecting the simulators via fast shared-memory queues at runtime. This improves build time, because simulation scale-up simply involves running more instances of the prebuilt simulators. It also addresses simulation speed, because prebuilt simulators can run in parallel, without fine-grained synchronization or global barriers. We introduce a framework, Switchboard, that implements our approach, and discuss two applications, demonstrating its speed, scalability, and accuracy: (1) a web application where users can run fast simulations of chiplets on an interposer, and (2) a wafer-scale simulation of one million RISC-V cores distributed across thousands of cloud compute cores. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2407_20537 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Switchboard: An Open-Source Framework for Modular Simulation of Large Hardware Systems Herbst, Steven Moroze, Noah Iglesias, Edgar Olofsson, Andreas Distributed, Parallel, and Cluster Computing Hardware Architecture Scaling up hardware systems has become an important tactic for improving performance as Moore's law fades. Unfortunately, simulations of large hardware systems are often a design bottleneck due to slow throughput and long build times. In this article, we propose a solution targeting designs composed of modular blocks connected by latency-insensitive interfaces. Our approach is to construct the hardware simulation in a similar fashion as the design itself, using a prebuilt simulator for each block and connecting the simulators via fast shared-memory queues at runtime. This improves build time, because simulation scale-up simply involves running more instances of the prebuilt simulators. It also addresses simulation speed, because prebuilt simulators can run in parallel, without fine-grained synchronization or global barriers. We introduce a framework, Switchboard, that implements our approach, and discuss two applications, demonstrating its speed, scalability, and accuracy: (1) a web application where users can run fast simulations of chiplets on an interposer, and (2) a wafer-scale simulation of one million RISC-V cores distributed across thousands of cloud compute cores. |
| title | Switchboard: An Open-Source Framework for Modular Simulation of Large Hardware Systems |
| topic | Distributed, Parallel, and Cluster Computing Hardware Architecture |
| url | https://arxiv.org/abs/2407.20537 |