Finite-Time Lyapunov Exponent Calculation on FPGA using High-Level Synthesis Tools
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arXiv
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| Autores principales: | , , , , , |
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| Formato: | Preprint |
| Publicado: |
2024
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| Acceso en línea: | |
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| _version_ | 1866911979270045696 |
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| author | de Castro, Manuel Osorio, Roberto R. Andujar, Francisco J. Carratalá-Sáez, Rocío Torres, Yuri Llanos, Diego R. |
| author_facet | de Castro, Manuel Osorio, Roberto R. Andujar, Francisco J. Carratalá-Sáez, Rocío Torres, Yuri Llanos, Diego R. |
| contents | As Field Programmable Gate Arrays (FPGAs) computing capabilities continue to grow, also does the interest on building scientific accelerators around them. Tools like Xilinx's High-Level Synthesis (HLS) help to bridge the gap between traditional high-level languages such as C and C++, and low-level hardware description languages such as VHDL and Verilog. In this report, we study the implementation of a fluid dynamics application, the Finite-Time Lyapunov Exponent (FTLE) calculation, on FPGA using HLS. We provide speed and resource-consumption results for 2- and 3-dimensional cases. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2408_02758 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Finite-Time Lyapunov Exponent Calculation on FPGA using High-Level Synthesis Tools de Castro, Manuel Osorio, Roberto R. Andujar, Francisco J. Carratalá-Sáez, Rocío Torres, Yuri Llanos, Diego R. Hardware Architecture 68 B.6.m As Field Programmable Gate Arrays (FPGAs) computing capabilities continue to grow, also does the interest on building scientific accelerators around them. Tools like Xilinx's High-Level Synthesis (HLS) help to bridge the gap between traditional high-level languages such as C and C++, and low-level hardware description languages such as VHDL and Verilog. In this report, we study the implementation of a fluid dynamics application, the Finite-Time Lyapunov Exponent (FTLE) calculation, on FPGA using HLS. We provide speed and resource-consumption results for 2- and 3-dimensional cases. |
| title | Finite-Time Lyapunov Exponent Calculation on FPGA using High-Level Synthesis Tools |
| topic | Hardware Architecture 68 B.6.m |
| url | https://arxiv.org/abs/2408.02758 |