HiMA: Hierarchical Quantum Microarchitecture for Qubit-Scaling and Quantum Process-Level Parallelism
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arXiv
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| Autori principali: | , , , , , , , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2024
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| _version_ | 1866916363788877824 |
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| author | Zhou, Qi Mei, Zi-Hao Shi, Han-Qing Guo, Liang-Liang Yang, Xiao-Yan Wang, Yun-Jie Xu, Xiao-Fan Xue, Cheng Kong, Wei-Cheng Wang, Jun-Chao Wu, Yu-Chun Chen, Zhao-Yun Guo, Guo-Ping |
| author_facet | Zhou, Qi Mei, Zi-Hao Shi, Han-Qing Guo, Liang-Liang Yang, Xiao-Yan Wang, Yun-Jie Xu, Xiao-Fan Xue, Cheng Kong, Wei-Cheng Wang, Jun-Chao Wu, Yu-Chun Chen, Zhao-Yun Guo, Guo-Ping |
| contents | Quantum computing holds immense potential for addressing a myriad of intricate challenges, which is significantly amplified when scaled to thousands of qubits. However, a major challenge lies in developing an efficient and scalable quantum control system. To address this, we propose a novel Hierarchical MicroArchitecture (HiMA) designed to facilitate qubit scaling and exploit quantum process-level parallelism. This microarchitecture is based on three core elements: (i) discrete qubit-level drive and readout, (ii) a process-based hierarchical trigger mechanism, and (iii) multiprocessing with a staggered triggering technique to enable efficient quantum process-level parallelism. We implement HiMA as a control system for a 72-qubit tunable superconducting quantum processing unit, serving a public quantum cloud computing platform, which is capable of expanding to 6144 qubits through three-layer cascading. In our benchmarking tests, HiMA achieves up to a 4.89x speedup under a 5-process parallel configuration. Consequently, to the best of our knowledge, we have achieved the highest CLOPS (Circuit Layer Operations Per Second), reaching up to 43,680, across all publicly available platforms. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2408_11311 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | HiMA: Hierarchical Quantum Microarchitecture for Qubit-Scaling and Quantum Process-Level Parallelism Zhou, Qi Mei, Zi-Hao Shi, Han-Qing Guo, Liang-Liang Yang, Xiao-Yan Wang, Yun-Jie Xu, Xiao-Fan Xue, Cheng Kong, Wei-Cheng Wang, Jun-Chao Wu, Yu-Chun Chen, Zhao-Yun Guo, Guo-Ping Hardware Architecture Quantum Physics Quantum computing holds immense potential for addressing a myriad of intricate challenges, which is significantly amplified when scaled to thousands of qubits. However, a major challenge lies in developing an efficient and scalable quantum control system. To address this, we propose a novel Hierarchical MicroArchitecture (HiMA) designed to facilitate qubit scaling and exploit quantum process-level parallelism. This microarchitecture is based on three core elements: (i) discrete qubit-level drive and readout, (ii) a process-based hierarchical trigger mechanism, and (iii) multiprocessing with a staggered triggering technique to enable efficient quantum process-level parallelism. We implement HiMA as a control system for a 72-qubit tunable superconducting quantum processing unit, serving a public quantum cloud computing platform, which is capable of expanding to 6144 qubits through three-layer cascading. In our benchmarking tests, HiMA achieves up to a 4.89x speedup under a 5-process parallel configuration. Consequently, to the best of our knowledge, we have achieved the highest CLOPS (Circuit Layer Operations Per Second), reaching up to 43,680, across all publicly available platforms. |
| title | HiMA: Hierarchical Quantum Microarchitecture for Qubit-Scaling and Quantum Process-Level Parallelism |
| topic | Hardware Architecture Quantum Physics |
| url | https://arxiv.org/abs/2408.11311 |