Research on LLM Acceleration Using the High-Performance RISC-V Processor "Xiangshan" (Nanhu Version) Based on the Open-Source Matrix Instruction Set Extension (Vector Dot Product)

Fuente: arXiv

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Bibliographic Details
Main Authors:	Chen, Xu-Hao, Hu, Si-Peng, Liu, Hong-Chao, Liu, Bo-Ran, Tang, Dan, Zhao, Di
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture C.1.3 [Other Architecture Styles]: RISC (Reduced Instruction Set Computing)
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2409.00661