Hardware/Algorithm Co-design for Real-Time I/O Control with Improved Timing Accuracy and Robustness

Fuente: arXiv

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Bibliographic Details
Main Authors:	Jiang, Zhe, Zhao, Shuai, Wei, Ran, Si, Xin, Chen, Gang, Guan, Nan
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture C.3; D.4.7
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2409.14779