:: Library Catalog

Cover Image

Saved in:

Bibliographic Details
Main Authors:	Huo, Pingyi, Devulapally, Anusha, Maruf, Hasan Al, Park, Minseo, Nair, Krishnakumar, Arunachalam, Meena, Akbulut, Gulsum Gudukbay, Kandemir, Mahmut Taylan, Narayanan, Vijaykrishnan
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture Distributed, Parallel, and Cluster Computing Information Retrieval Machine Learning
Online Access:	https://arxiv.org/abs/2409.16633
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Diagnosing FP4 inference: a layer-wise and block-wise sensitivity analysis of NVFP4 and MXFP4
by: Cim, Musa, et al.
Published: (2026)

Synergistic and Efficient Edge-Host Communication for Energy Harvesting Wireless Sensor Networks
by: Mishra, Cyan Subhra, et al.
Published: (2024)

AutoGNN: End-to-End Hardware-Driven Graph Preprocessing for Enhanced GNN Performance
by: Kang, Seungkwan, et al.
Published: (2026)

Salient Store: Enabling Smart Storage for Continuous Learning Edge Servers
by: Mishra, Cyan Subhra, et al.
Published: (2024)

Pushing the Performance Envelope of DNN-based Recommendation Systems Inference on GPUs
by: Jain, Rishabh, et al.
Published: (2024)

STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration
by: Parekh, Varun Darshana, et al.
Published: (2025)

ACiS: Complex Processing in the Switch Fabric
by: Haghi, Pouya, et al.
Published: (2025)

RecFlash: Fast Recommendation System on In-Storage Computing with Frequency-Based Data Mapping
by: Baik, Jangho, et al.
Published: (2026)

Parallelization Strategies for Dense LLM Deployment: Navigating Through Application-Specific Tradeoffs and Bottlenecks
by: Topcu, Burak, et al.
Published: (2026)

Single-Cell Universal Logic-in-Memory Using 2T-nC FeRAM: An Area and Energy-Efficient Approach for Bulk Bitwise Computation
by: Biswas, Rudra, et al.
Published: (2025)

Containerized In-Storage Processing and Computing-Enabled SSD Disaggregation
by: Kwon, Miryeong, et al.
Published: (2025)

Pretraining large language models with MXFP4 on Native FP4 Hardware
by: Cim, Musa, et al.
Published: (2026)

Heterogeneous Acceleration Pipeline for Recommendation System Training
by: Adnan, Muhammad, et al.
Published: (2022)

Fletch: File-System Metadata Caching in Programmable Switches
by: Liu, Qingxiu, et al.
Published: (2025)

The Dirty Secret of SSDs: Embodied Carbon
by: Tannu, Swamit, et al.
Published: (2022)

Ultra Low-Power SDM-based Circuit-Switching for Networks-on-Chip
by: Zaeemi, Meysam, et al.
Published: (2026)

ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key
by: Wang, Jianfeng, et al.
Published: (2022)

A Switch-Centric In-Network Architecture for Accelerating LLM Inference in Shared-Memory Network
by: Jiang, Aojie, et al.
Published: (2026)

In-place Switch: Reprogramming based SLC Cache Design for Hybrid 3D SSDs
by: Yang, Xufeng, et al.
Published: (2024)

FEATHER: A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
by: Tong, Jianming, et al.
Published: (2024)

Switch-Less Dragonfly on Wafers: A Scalable Interconnection Architecture based on Wafer-Scale Integration
by: Feng, Yinxiao, et al.
Published: (2024)

Design of a 6-bit Threshold Inverter Quantization (TIQ) Flash Analog to Digital Converter (ADC)
by: Sarkar, Noyon Kumar, et al.
Published: (2025)

Commercial Evaluation of Zero-Skipping MAC Design for Bit Sparsity Exploitation in DL Inference
by: Nair, Harideep, et al.
Published: (2024)

AutoRAC: Automated Processing-in-Memory Accelerator Design for Recommender Systems
by: Cheng, Feng, et al.
Published: (2025)

FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Large Attention-Based Model Inference on Tile-Based Accelerators
by: Zhang, Chi, et al.
Published: (2026)

FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Efficient Multi-Head Attention on Tile-Based Many-PE Accelerators
by: Zhang, Chi, et al.
Published: (2025)

Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing
by: Huo, Juncheng, et al.
Published: (2025)

FusionCIM: Accelerating LLM Inference with Fusion-Driven Computing-in-Memory Architecture
by: Xuan, Zihao, et al.
Published: (2026)

NeuroAI Temporal Neural Networks (NeuTNNs): Microarchitecture and Design Framework for Specialized Neuromorphic Processing Units
by: Venkatachalam, Shanmuga, et al.
Published: (2026)

Evaluating LLM-based Workflows for Switched-Mode Power Supply Design
by: Nau, Simon, et al.
Published: (2025)

Switching Frequency as FPGA Monitor: Studying Degradation and Ageing Prognosis at Large Scale
by: Lanzieri, Leandro, et al.
Published: (2024)

NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors
by: Nair, Harideep, et al.
Published: (2024)

Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators
by: Vellaisamy, Prabhu, et al.
Published: (2026)

tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit
by: Vellaisamy, Prabhu, et al.
Published: (2024)

SCARF: Securing Chips with a Robust Framework against Fabrication-time Hardware Trojans
by: Eslami, Mohammad, et al.
Published: (2024)

Faithful Dynamic Timing Analysis of Digital Circuits Using Continuous Thresholded Mode-Switched ODEs
by: Ferdowsi, Arman, et al.
Published: (2024)

CiFlow: Dataflow Analysis and Optimization of Key Switching for Homomorphic Encryption
by: Neda, Negar, et al.
Published: (2023)

SPAC: Automating FPGA-based Network Switches with Protocol Adaptive Customization
by: Li, Guoyu, et al.
Published: (2026)

Accelerating Recommendation System Training by Leveraging Popular Choices
by: Adnan, Muhammad, et al.
Published: (2021)

A Blueprint for Precise and Fault-Tolerant Analog Neural Networks
by: Demirkiran, Cansu, et al.
Published: (2023)