Cita APA (7a ed.)

Serhiayenka, P., Roche, S., Carlson, B., & Hong, T. M. (2024). Nanosecond hardware regression trees in FPGA at the LHC.

Cita Chicago Style (17a ed.)

Serhiayenka, Pavel, Stephen Roche, Benjamin Carlson, y Tae Min Hong. Nanosecond Hardware Regression Trees in FPGA at the LHC. 2024.

Cita MLA (9a ed.)

Serhiayenka, Pavel, et al. Nanosecond Hardware Regression Trees in FPGA at the LHC. 2024.