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Main Authors: Delavari, Arvin, Ghoreishy, Faraz, Shahhoseini, Hadi Shahriar, Mirzakuchaki, Sattar
Format: Preprint
Published: 2024
Subjects:
Online Access:https://arxiv.org/abs/2410.00622
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author Delavari, Arvin
Ghoreishy, Faraz
Shahhoseini, Hadi Shahriar
Mirzakuchaki, Sattar
author_facet Delavari, Arvin
Ghoreishy, Faraz
Shahhoseini, Hadi Shahriar
Mirzakuchaki, Sattar
contents The demand for energy-efficient and high performance embedded systems drives the evolution of new hardware architectures, including concepts like approximate computing. This paper presents a novel reconfigurable embedded platform named "phoeniX", using the standard RISC-V ISA, maximizing energy efficiency while maintaining acceptable application-level accuracy. The platform enables the integration of approximate circuits at the core level with diverse structures, accuracies, and timings without requiring modifications to the core, particularly in the control logic. The platform introduces novel control features, allowing configurable trade-offs between accuracy and energy consumption based on specific application requirements. To evaluate the effectiveness of the platform, experiments were conducted on a set of applications, such as image processing and Dhrystone benchmark. The core with its original execution engine, occupies 0.024mm2 of area, with average power consumption of 4.23mW at 1.1V operating voltage, average energy-efficiency of 7.85pJ per operation at 620MHz frequency in 45nm CMOS technology. The configurable platform with a highly optimized 3-stage pipelined RV32I(E)M architecture, possesses a DMIPS/MHz of 1.89, and a CPI of 1.13, showcasing remarkable capabilities for an embedded processor.
format Preprint
id arxiv_https___arxiv_org_abs_2410_00622
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle A Reconfigurable Approximate Computing RISC-V Platform for Fault-Tolerant Applications
Delavari, Arvin
Ghoreishy, Faraz
Shahhoseini, Hadi Shahriar
Mirzakuchaki, Sattar
Hardware Architecture
The demand for energy-efficient and high performance embedded systems drives the evolution of new hardware architectures, including concepts like approximate computing. This paper presents a novel reconfigurable embedded platform named "phoeniX", using the standard RISC-V ISA, maximizing energy efficiency while maintaining acceptable application-level accuracy. The platform enables the integration of approximate circuits at the core level with diverse structures, accuracies, and timings without requiring modifications to the core, particularly in the control logic. The platform introduces novel control features, allowing configurable trade-offs between accuracy and energy consumption based on specific application requirements. To evaluate the effectiveness of the platform, experiments were conducted on a set of applications, such as image processing and Dhrystone benchmark. The core with its original execution engine, occupies 0.024mm2 of area, with average power consumption of 4.23mW at 1.1V operating voltage, average energy-efficiency of 7.85pJ per operation at 620MHz frequency in 45nm CMOS technology. The configurable platform with a highly optimized 3-stage pipelined RV32I(E)M architecture, possesses a DMIPS/MHz of 1.89, and a CPI of 1.13, showcasing remarkable capabilities for an embedded processor.
title A Reconfigurable Approximate Computing RISC-V Platform for Fault-Tolerant Applications
topic Hardware Architecture
url https://arxiv.org/abs/2410.00622