Saved in:
| Main Authors: | , , , |
|---|---|
| Format: | Preprint |
| Published: |
2024
|
| Subjects: | |
| Online Access: | https://arxiv.org/abs/2410.07027 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866910642311528448 |
|---|---|
| author | Delavari, Arvin Ghoreishy, Faraz Shahhoseini, Hadi Shahriar Mirzakuchaki, Sattar |
| author_facet | Delavari, Arvin Ghoreishy, Faraz Shahhoseini, Hadi Shahriar Mirzakuchaki, Sattar |
| contents | The limited energy available in most embedded systems poses a significant challenge in enhancing the performance of embedded processors and microcontrollers. One promising approach to address this challenge is the use of approximate computing, which can be implemented in both hardware and software layers to balance the trade-off between performance and power consumption. In this study, the impact of dynamic hardware approximation methods on the run-time energy efficiency of a RISC-V embedded processor with specialized features for approximate computing is investigated. The results indicate that the platform achieves an average energy efficiency of 13.3 pJ/instruction at a 500MHz clock frequency adhering approximation in 45nm CMOS technology. Compared to accurate circuits and computation, the approximate computing techniques in the processing core resulted in a significant improvement of 9.21% in overall energy efficiency, 60.83% in multiplication instructions, 14.64% in execution stage, and 9.23% in overall power consumption. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2410_07027 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Evaluation of Run-Time Energy Efficiency using Controlled Approximation in a RISC-V Core Delavari, Arvin Ghoreishy, Faraz Shahhoseini, Hadi Shahriar Mirzakuchaki, Sattar Hardware Architecture The limited energy available in most embedded systems poses a significant challenge in enhancing the performance of embedded processors and microcontrollers. One promising approach to address this challenge is the use of approximate computing, which can be implemented in both hardware and software layers to balance the trade-off between performance and power consumption. In this study, the impact of dynamic hardware approximation methods on the run-time energy efficiency of a RISC-V embedded processor with specialized features for approximate computing is investigated. The results indicate that the platform achieves an average energy efficiency of 13.3 pJ/instruction at a 500MHz clock frequency adhering approximation in 45nm CMOS technology. Compared to accurate circuits and computation, the approximate computing techniques in the processing core resulted in a significant improvement of 9.21% in overall energy efficiency, 60.83% in multiplication instructions, 14.64% in execution stage, and 9.23% in overall power consumption. |
| title | Evaluation of Run-Time Energy Efficiency using Controlled Approximation in a RISC-V Core |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2410.07027 |