A Remedy to Compute-in-Memory with Dynamic Random Access Memory: 1FeFET-1C Technology for Neuro-Symbolic AI
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arXiv
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| Format: | Preprint |
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2024
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| _version_ | 1866913556815937536 |
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| author | Yin, Xunzhao Barkam, Hamza Errahmouni Müller, Franz Jiang, Yuxiao Imani, Mohsen Abdulazhanov, Sukhrob Vardar, Alptekin Laleni, Nellie Zhao, Zijian Duan, Jiahui Shi, Zhiguo Joshi, Siddharth Niemier, Michael Hu, Xiaobo Sharon Zhuo, Cheng Kämpfe, Thomas Ni, Kai |
| author_facet | Yin, Xunzhao Barkam, Hamza Errahmouni Müller, Franz Jiang, Yuxiao Imani, Mohsen Abdulazhanov, Sukhrob Vardar, Alptekin Laleni, Nellie Zhao, Zijian Duan, Jiahui Shi, Zhiguo Joshi, Siddharth Niemier, Michael Hu, Xiaobo Sharon Zhuo, Cheng Kämpfe, Thomas Ni, Kai |
| contents | Neuro-symbolic artificial intelligence (AI) excels at learning from noisy and generalized patterns, conducting logical inferences, and providing interpretable reasoning. Comprising a 'neuro' component for feature extraction and a 'symbolic' component for decision-making, neuro-symbolic AI has yet to fully benefit from efficient hardware accelerators. Additionally, current hardware struggles to accommodate applications requiring dynamic resource allocation between these two components. To address these challenges-and mitigate the typical data-transfer bottleneck of classical Von Neumann architectures-we propose a ferroelectric charge-domain compute-in-memory (CiM) array as the foundational processing element for neuro-symbolic AI. This array seamlessly handles both the critical multiply-accumulate (MAC) operations of the 'neuro' workload and the parallel associative search operations of the 'symbolic' workload. To enable this approach, we introduce an innovative 1FeFET-1C cell, combining a ferroelectric field-effect transistor (FeFET) with a capacitor. This design, overcomes the destructive sensing limitations of DRAM in CiM applications, while capable of capitalizing decades of DRAM expertise with a similar cell structure as DRAM, achieves high immunity against FeFET variation-crucial for neuro-symbolic AI-and demonstrates superior energy efficiency. The functionalities of our design have been successfully validated through SPICE simulations and prototype fabrication and testing. Our hardware platform has been benchmarked in executing typical neuro-symbolic AI reasoning tasks, showing over 2x improvement in latency and 1000x improvement in energy efficiency compared to GPU-based implementations. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2410_15296 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | A Remedy to Compute-in-Memory with Dynamic Random Access Memory: 1FeFET-1C Technology for Neuro-Symbolic AI Yin, Xunzhao Barkam, Hamza Errahmouni Müller, Franz Jiang, Yuxiao Imani, Mohsen Abdulazhanov, Sukhrob Vardar, Alptekin Laleni, Nellie Zhao, Zijian Duan, Jiahui Shi, Zhiguo Joshi, Siddharth Niemier, Michael Hu, Xiaobo Sharon Zhuo, Cheng Kämpfe, Thomas Ni, Kai Emerging Technologies Neural and Evolutionary Computing Symbolic Computation Neuro-symbolic artificial intelligence (AI) excels at learning from noisy and generalized patterns, conducting logical inferences, and providing interpretable reasoning. Comprising a 'neuro' component for feature extraction and a 'symbolic' component for decision-making, neuro-symbolic AI has yet to fully benefit from efficient hardware accelerators. Additionally, current hardware struggles to accommodate applications requiring dynamic resource allocation between these two components. To address these challenges-and mitigate the typical data-transfer bottleneck of classical Von Neumann architectures-we propose a ferroelectric charge-domain compute-in-memory (CiM) array as the foundational processing element for neuro-symbolic AI. This array seamlessly handles both the critical multiply-accumulate (MAC) operations of the 'neuro' workload and the parallel associative search operations of the 'symbolic' workload. To enable this approach, we introduce an innovative 1FeFET-1C cell, combining a ferroelectric field-effect transistor (FeFET) with a capacitor. This design, overcomes the destructive sensing limitations of DRAM in CiM applications, while capable of capitalizing decades of DRAM expertise with a similar cell structure as DRAM, achieves high immunity against FeFET variation-crucial for neuro-symbolic AI-and demonstrates superior energy efficiency. The functionalities of our design have been successfully validated through SPICE simulations and prototype fabrication and testing. Our hardware platform has been benchmarked in executing typical neuro-symbolic AI reasoning tasks, showing over 2x improvement in latency and 1000x improvement in energy efficiency compared to GPU-based implementations. |
| title | A Remedy to Compute-in-Memory with Dynamic Random Access Memory: 1FeFET-1C Technology for Neuro-Symbolic AI |
| topic | Emerging Technologies Neural and Evolutionary Computing Symbolic Computation |
| url | https://arxiv.org/abs/2410.15296 |