Design of a 64-bit SQRT-CSLA with Reduced Area and High-Speed Applications in Low Power VLSI Circuits

Fuente: arXiv

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Bibliographic Details
Main Authors:	Pallavi, CH., Padma, C., Kumar, R. Kiran, Suguna, T., Nalini, C.
Format:	Preprint
Published:	2024
Subjects:	Hardware Architecture Emerging Technologies
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2410.15736