A 0.03${mm}^2$ 100-250MHz Charge-Pump or Amplifier-Less Integrating Sub-Sampling PLL for Ultra-low Power Communication and Computing

Fuente: arXiv

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Bibliographic Details
Main Authors:	Ray, Yudhajit, Ghosh, Archisman, Sen, Shreyas
Format:	Preprint
Published:	2024
Subjects:	Signal Processing Hardware Architecture
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2410.16310