Connectivity Labeling Schemes for Edge and Vertex Faults via Expander Hierarchies
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| Format: | Preprint |
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2024
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| _version_ | 1866914987281219584 |
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| author | Long, Yaowei Pettie, Seth Saranurak, Thatchaphol |
| author_facet | Long, Yaowei Pettie, Seth Saranurak, Thatchaphol |
| contents | We consider the problem of assigning short labels to the vertices and edges of a graph $G$ so that given any query $\langle s,t,F\rangle$ with $|F|\leq f$, we can determine whether $s$ and $t$ are still connected in $G-F$, given only the labels of $F\cup\{s,t\}$. This problem has been considered when $F\subset E$ (edge faults), where correctness is guaranteed with high probability (w.h.p.) or deterministically, and when $F\subset V$ (vertex faults), both w.h.p.~and deterministically. Our main results are as follows.
[Deterministic Edge Faults.] We give a new deterministic labeling scheme for edge faults that uses $\tilde{O}(\sqrt{f})$-bit labels, which can be constructed in polynomial time. This improves on Dory and Parter's [PODC 2021] existential bound of $O(f\log n)$ (requiring exponential time to compute) and the efficient $\tilde{O}(f^2)$-bit scheme of Izumi, Emek, Wadayama, and Masuzawa [PODC 2023]. Our construction uses an improved edge-expander hierarchy and a distributed coding technique based on Reed-Solomon codes.
[Deterministic Vertex Faults.] We improve Parter, Petruschka, and Pettie's [STOC 2024] deterministic $O(f^7\log^{13} n)$-bit labeling scheme for vertex faults to $O(f^4\log^{7.5} n)$ bits, using an improved vertex-expander hierarchy and better sparsification of shortcut graphs.
[Randomized Edge/Verex Faults.] We improve the size of Dory and Parter's [PODC 2021] randomized edge fault labeling scheme from $O(\min\{f+\log n, \log^3 n\})$ bits to $O(\min\{f+\log n, \log^2 n\log f\})$ bits, shaving a $\log n/\log f$ factor. We also improve the size of Parter, Petruschka, and Pettie's [STOC 2024] randomized vertex fault labeling scheme from $O(f^3\log^5 n)$ bits to $O(f^2\log^6 n)$ bits, which comes closer to their $Ω(f)$-bit lower bound. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2410_18885 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Connectivity Labeling Schemes for Edge and Vertex Faults via Expander Hierarchies Long, Yaowei Pettie, Seth Saranurak, Thatchaphol Data Structures and Algorithms We consider the problem of assigning short labels to the vertices and edges of a graph $G$ so that given any query $\langle s,t,F\rangle$ with $|F|\leq f$, we can determine whether $s$ and $t$ are still connected in $G-F$, given only the labels of $F\cup\{s,t\}$. This problem has been considered when $F\subset E$ (edge faults), where correctness is guaranteed with high probability (w.h.p.) or deterministically, and when $F\subset V$ (vertex faults), both w.h.p.~and deterministically. Our main results are as follows. [Deterministic Edge Faults.] We give a new deterministic labeling scheme for edge faults that uses $\tilde{O}(\sqrt{f})$-bit labels, which can be constructed in polynomial time. This improves on Dory and Parter's [PODC 2021] existential bound of $O(f\log n)$ (requiring exponential time to compute) and the efficient $\tilde{O}(f^2)$-bit scheme of Izumi, Emek, Wadayama, and Masuzawa [PODC 2023]. Our construction uses an improved edge-expander hierarchy and a distributed coding technique based on Reed-Solomon codes. [Deterministic Vertex Faults.] We improve Parter, Petruschka, and Pettie's [STOC 2024] deterministic $O(f^7\log^{13} n)$-bit labeling scheme for vertex faults to $O(f^4\log^{7.5} n)$ bits, using an improved vertex-expander hierarchy and better sparsification of shortcut graphs. [Randomized Edge/Verex Faults.] We improve the size of Dory and Parter's [PODC 2021] randomized edge fault labeling scheme from $O(\min\{f+\log n, \log^3 n\})$ bits to $O(\min\{f+\log n, \log^2 n\log f\})$ bits, shaving a $\log n/\log f$ factor. We also improve the size of Parter, Petruschka, and Pettie's [STOC 2024] randomized vertex fault labeling scheme from $O(f^3\log^5 n)$ bits to $O(f^2\log^6 n)$ bits, which comes closer to their $Ω(f)$-bit lower bound. |
| title | Connectivity Labeling Schemes for Edge and Vertex Faults via Expander Hierarchies |
| topic | Data Structures and Algorithms |
| url | https://arxiv.org/abs/2410.18885 |