Harnessing Room-Temperature Ferroelectricity in Metal Oxide Monolayers for Advanced Logic Devices

Fuente: arXiv
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Main Authors: Naseer, Ateeb, Rafiq, Musaib, Bhowmick, Somnath, Agarwal, Amit, Chauhan, Yogesh Singh
Format: Preprint
Published: 2024
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_version_ 1866909365161689088
author Naseer, Ateeb
Rafiq, Musaib
Bhowmick, Somnath
Agarwal, Amit
Chauhan, Yogesh Singh
author_facet Naseer, Ateeb
Rafiq, Musaib
Bhowmick, Somnath
Agarwal, Amit
Chauhan, Yogesh Singh
contents Two-dimensional ferroelectric materials are beneficial for power-efficient memory devices and transistor applications. Here, we predict out-of-plane ferroelectricity in a new family of buckled metal oxide (MO; M: Ge, Sn, Pb) monolayers with significant spontaneous polarization. Additionally, these monolayers have a narrow valence band, which is energetically separated from the rest of the low-lying valence bands. Such a unique band structure limits the long thermal tail of the hot carriers, mitigating subthreshold thermionic leakage and allowing field-effect transistors (FETs) to function beyond the bounds imposed on conventional FETs by thermodynamics. Our quantum transport simulations reveal that the FETs based on these MO monolayers exhibit a large ON/OFF ratio with an average subthreshold swing of less than 60 mV/decade at room temperature, even for short gate lengths. Our work motivates further exploration of the MO monolayers for developing advanced, high-performance memory and logic devices.
format Preprint
id arxiv_https___arxiv_org_abs_2410_19582
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle Harnessing Room-Temperature Ferroelectricity in Metal Oxide Monolayers for Advanced Logic Devices
Naseer, Ateeb
Rafiq, Musaib
Bhowmick, Somnath
Agarwal, Amit
Chauhan, Yogesh Singh
Applied Physics
Materials Science
Quantum Physics
Two-dimensional ferroelectric materials are beneficial for power-efficient memory devices and transistor applications. Here, we predict out-of-plane ferroelectricity in a new family of buckled metal oxide (MO; M: Ge, Sn, Pb) monolayers with significant spontaneous polarization. Additionally, these monolayers have a narrow valence band, which is energetically separated from the rest of the low-lying valence bands. Such a unique band structure limits the long thermal tail of the hot carriers, mitigating subthreshold thermionic leakage and allowing field-effect transistors (FETs) to function beyond the bounds imposed on conventional FETs by thermodynamics. Our quantum transport simulations reveal that the FETs based on these MO monolayers exhibit a large ON/OFF ratio with an average subthreshold swing of less than 60 mV/decade at room temperature, even for short gate lengths. Our work motivates further exploration of the MO monolayers for developing advanced, high-performance memory and logic devices.
title Harnessing Room-Temperature Ferroelectricity in Metal Oxide Monolayers for Advanced Logic Devices
topic Applied Physics
Materials Science
Quantum Physics
url https://arxiv.org/abs/2410.19582