A Host-SSD Collaborative Write Accelerator for LSM-Tree-Based Key-Value Stores
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arXiv
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| Autori principali: | , , , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2024
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| _version_ | 1866917821318955008 |
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| author | Kim, KiHwan Chung, Hyunsun Ahn, Seonghoon Park, Junhyeok Jamil, Safdar Byun, Hongsu Lee, Myungcheol Choi, Jinchun Kim, Youngjae |
| author_facet | Kim, KiHwan Chung, Hyunsun Ahn, Seonghoon Park, Junhyeok Jamil, Safdar Byun, Hongsu Lee, Myungcheol Choi, Jinchun Kim, Youngjae |
| contents | Log-Structured Merge (LSM) tree-based Key-Value Stores (KVSs) are widely adopted for their high performance in write-intensive environments, but they often face performance degradation due to write stalls during compaction. Prior solutions, such as regulating I/O traffic or using multiple compaction threads, can cause unexpected drops in throughput or increase host CPU usage, while hardware-based approaches using FPGA, GPU, and DPU aimed at reducing compaction duration introduce additional hardware costs. In this study, we propose KVACCEL, a novel hardware-software co-design framework that eliminates write stalls by leveraging a dual-interface SSD. KVACCEL allocates logical NAND flash space to support both block and key-value interfaces, using the key-value interface as a temporary write buffer during write stalls. This strategy significantly reduces write stalls, optimizes resource usage, and ensures consistency between the host and device by implementing an in-device LSM-based write buffer with an iterator-based range scan mechanism. Our extensive evaluation shows that for write-intensive workloads, KVACCEL outperforms ADOC by up to 1.17x in terms of throughput and performance-to-CPU-utilization efficiency. For mixed read-write workloads, both demonstrate comparable performance. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2410_21760 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | A Host-SSD Collaborative Write Accelerator for LSM-Tree-Based Key-Value Stores Kim, KiHwan Chung, Hyunsun Ahn, Seonghoon Park, Junhyeok Jamil, Safdar Byun, Hongsu Lee, Myungcheol Choi, Jinchun Kim, Youngjae Hardware Architecture Log-Structured Merge (LSM) tree-based Key-Value Stores (KVSs) are widely adopted for their high performance in write-intensive environments, but they often face performance degradation due to write stalls during compaction. Prior solutions, such as regulating I/O traffic or using multiple compaction threads, can cause unexpected drops in throughput or increase host CPU usage, while hardware-based approaches using FPGA, GPU, and DPU aimed at reducing compaction duration introduce additional hardware costs. In this study, we propose KVACCEL, a novel hardware-software co-design framework that eliminates write stalls by leveraging a dual-interface SSD. KVACCEL allocates logical NAND flash space to support both block and key-value interfaces, using the key-value interface as a temporary write buffer during write stalls. This strategy significantly reduces write stalls, optimizes resource usage, and ensures consistency between the host and device by implementing an in-device LSM-based write buffer with an iterator-based range scan mechanism. Our extensive evaluation shows that for write-intensive workloads, KVACCEL outperforms ADOC by up to 1.17x in terms of throughput and performance-to-CPU-utilization efficiency. For mixed read-write workloads, both demonstrate comparable performance. |
| title | A Host-SSD Collaborative Write Accelerator for LSM-Tree-Based Key-Value Stores |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2410.21760 |