Revealing Floating-Point Accumulation Orders in Software/Hardware Implementations
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arXiv
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| Autores principales: | , , , |
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| Formato: | Preprint |
| Publicado: |
2024
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| _version_ | 1866911030090661888 |
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| author | Xie, Peichen Gao, Yanjie Wang, Yang Xue, Jilong |
| author_facet | Xie, Peichen Gao, Yanjie Wang, Yang Xue, Jilong |
| contents | Accumulation-based operations, such as summation and matrix multiplication, are fundamental to numerous computational domains. However, their accumulation orders are often undocumented in existing software and hardware implementations, making it difficult for developers to ensure consistent results across systems. To address this issue, we introduce FPRev, a diagnostic tool designed to reveal the accumulation order in the software and hardware implementations through numerical testing. With FPRev, developers can identify and compare accumulation orders, enabling developers to create reproducible software and verify implementation equivalence.
FPRev is a testing-based tool that non-intrusively reveals the accumulation order by analyzing the outputs of the tested implementation for distinct specially designed inputs. Employing FPRev, we showcase the accumulation orders of popular libraries (such as NumPy and PyTorch) on CPUs and GPUs (including GPUs with specialized matrix accelerators such as Tensor Cores). We also validate the efficiency of FPRev through extensive experiments. FPRev exhibits a lower time complexity compared to the basic solution. FPRev is open-sourced at https://github.com/peichenxie/FPRev. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2411_00442 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Revealing Floating-Point Accumulation Orders in Software/Hardware Implementations Xie, Peichen Gao, Yanjie Wang, Yang Xue, Jilong Numerical Analysis Mathematical Software Software Engineering Accumulation-based operations, such as summation and matrix multiplication, are fundamental to numerous computational domains. However, their accumulation orders are often undocumented in existing software and hardware implementations, making it difficult for developers to ensure consistent results across systems. To address this issue, we introduce FPRev, a diagnostic tool designed to reveal the accumulation order in the software and hardware implementations through numerical testing. With FPRev, developers can identify and compare accumulation orders, enabling developers to create reproducible software and verify implementation equivalence. FPRev is a testing-based tool that non-intrusively reveals the accumulation order by analyzing the outputs of the tested implementation for distinct specially designed inputs. Employing FPRev, we showcase the accumulation orders of popular libraries (such as NumPy and PyTorch) on CPUs and GPUs (including GPUs with specialized matrix accelerators such as Tensor Cores). We also validate the efficiency of FPRev through extensive experiments. FPRev exhibits a lower time complexity compared to the basic solution. FPRev is open-sourced at https://github.com/peichenxie/FPRev. |
| title | Revealing Floating-Point Accumulation Orders in Software/Hardware Implementations |
| topic | Numerical Analysis Mathematical Software Software Engineering |
| url | https://arxiv.org/abs/2411.00442 |