Energy-Aware FPGA Implementation of Spiking Neural Network with LIF Neurons
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arXiv
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| Autori principali: | , , |
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| Natura: | Preprint |
| Pubblicazione: |
2024
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| _version_ | 1866912103153008640 |
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| author | Ali, Asmer Hamid Navardi, Mozhgan Mohsenin, Tinoosh |
| author_facet | Ali, Asmer Hamid Navardi, Mozhgan Mohsenin, Tinoosh |
| contents | Tiny Machine Learning (TinyML) has become a growing field in on-device processing for Internet of Things (IoT) applications, capitalizing on AI algorithms that are optimized for their low complexity and energy efficiency. These algorithms are designed to minimize power and memory footprints, making them ideal for the constraints of IoT devices. Within this domain, Spiking Neural Networks (SNNs) stand out as a cutting-edge solution for TinyML, owning to their event-driven processing paradigm which offers an efficient method of handling dataflow. This paper presents a novel SNN architecture based on the 1st Order Leaky Integrate-and-Fire (LIF) neuron model to efficiently deploy vision-based ML algorithms on TinyML systems. A hardware-friendly LIF design is also proposed, and implemented on a Xilinx Artix-7 FPGA. To evaluate the proposed model, a collision avoidance dataset is considered as a case study. The proposed SNN model is compared to the state-of-the-art works and Binarized Convolutional Neural Network (BCNN) as a baseline. The results show the proposed approach is 86% more energy efficient than the baseline. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2411_01628 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Energy-Aware FPGA Implementation of Spiking Neural Network with LIF Neurons Ali, Asmer Hamid Navardi, Mozhgan Mohsenin, Tinoosh Hardware Architecture Machine Learning Neural and Evolutionary Computing Tiny Machine Learning (TinyML) has become a growing field in on-device processing for Internet of Things (IoT) applications, capitalizing on AI algorithms that are optimized for their low complexity and energy efficiency. These algorithms are designed to minimize power and memory footprints, making them ideal for the constraints of IoT devices. Within this domain, Spiking Neural Networks (SNNs) stand out as a cutting-edge solution for TinyML, owning to their event-driven processing paradigm which offers an efficient method of handling dataflow. This paper presents a novel SNN architecture based on the 1st Order Leaky Integrate-and-Fire (LIF) neuron model to efficiently deploy vision-based ML algorithms on TinyML systems. A hardware-friendly LIF design is also proposed, and implemented on a Xilinx Artix-7 FPGA. To evaluate the proposed model, a collision avoidance dataset is considered as a case study. The proposed SNN model is compared to the state-of-the-art works and Binarized Convolutional Neural Network (BCNN) as a baseline. The results show the proposed approach is 86% more energy efficient than the baseline. |
| title | Energy-Aware FPGA Implementation of Spiking Neural Network with LIF Neurons |
| topic | Hardware Architecture Machine Learning Neural and Evolutionary Computing |
| url | https://arxiv.org/abs/2411.01628 |