Further Evaluations of a Didactic CPU Visual Simulator (CPUVSIM)
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arXiv
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| Format: | Preprint |
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2024
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| _version_ | 1866913574260047872 |
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| author | Cortinovis, Renato Abdellatif, Tamer Mohamed Goyal, Devender Capretz, Luiz Fernando |
| author_facet | Cortinovis, Renato Abdellatif, Tamer Mohamed Goyal, Devender Capretz, Luiz Fernando |
| contents | This paper discusses further evaluations of the educational effectiveness of an existing CPU visual simulator (CPUVSIM). The CPUVSIM, as an Open Educational Resource, has been iteratively improved over a number of years following an Open Pedagogy approach, and was designed to enhance novices understanding of computer operation and mapping from high-level code to assembly language. The literature reports previous evaluations of the simulator, at K12 and undergraduate level, conducted from the perspectives of both developers and students, albeit with a limited sample size and primarily through qualitative methods. This paper describes additional evaluation activities designed to provide a more comprehensive assessment, across diverse educational settings: an action research pilot study recently carried out in Singapore and the planning of a more quantitative-oriented study in Dubai, with a larger sample size. Results from the pilot study in Singapore confirm the effectiveness and high level of appreciation of the tool, alongside a few identified challenges, which inform the planning of the more comprehensive evaluation in Dubai. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2411_05229 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Further Evaluations of a Didactic CPU Visual Simulator (CPUVSIM) Cortinovis, Renato Abdellatif, Tamer Mohamed Goyal, Devender Capretz, Luiz Fernando Hardware Architecture This paper discusses further evaluations of the educational effectiveness of an existing CPU visual simulator (CPUVSIM). The CPUVSIM, as an Open Educational Resource, has been iteratively improved over a number of years following an Open Pedagogy approach, and was designed to enhance novices understanding of computer operation and mapping from high-level code to assembly language. The literature reports previous evaluations of the simulator, at K12 and undergraduate level, conducted from the perspectives of both developers and students, albeit with a limited sample size and primarily through qualitative methods. This paper describes additional evaluation activities designed to provide a more comprehensive assessment, across diverse educational settings: an action research pilot study recently carried out in Singapore and the planning of a more quantitative-oriented study in Dubai, with a larger sample size. Results from the pilot study in Singapore confirm the effectiveness and high level of appreciation of the tool, alongside a few identified challenges, which inform the planning of the more comprehensive evaluation in Dubai. |
| title | Further Evaluations of a Didactic CPU Visual Simulator (CPUVSIM) |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2411.05229 |