Saved in:
| Main Authors: | , , , , , , , , , , , |
|---|---|
| Format: | Preprint |
| Published: |
2024
|
| Subjects: | |
| Online Access: | https://arxiv.org/abs/2411.06376 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866913021839802368 |
|---|---|
| author | Huang, Zhibai Chen, Chen Yen, James Shen, Yihan Xie, Yongchen Wei, Zhixiang Xu, Kailiang Wang, Yun Liu, Fangxin Song, Tao Xia, Mingyuan Qi, Zhengwei |
| author_facet | Huang, Zhibai Chen, Chen Yen, James Shen, Yihan Xie, Yongchen Wei, Zhixiang Xu, Kailiang Wang, Yun Liu, Fangxin Song, Tao Xia, Mingyuan Qi, Zhengwei |
| contents | Peripheral Component Interconnect Express (PCIe) is the de facto interconnect standard for high-speed peripherals and CPUs. The development of PCIe devices for emerging applications requires realistic Transaction Layer Packet (TLP) traces that accurately simulate device-CPU interactions. While generative AI offers a promising avenue for synthesizing complex TLP sequences, it is prone to a critical challenge inherent in all generation tasks: hallucination. Naively applying these models often produces traces that violate fundamental PCIe protocol rules, such as ordering and causality, rendering them unusable for device simulation. To resolve this, our work introduces a methodology to bridge the gap between generative AI and high-fidelity device simulation. This paper presents Phantom, a framework that systematically addresses AI-generated hallucinations in TLP synthesis. Phantom achieves this by coupling a generative backbone with a novel post-processing filter that enforces PCIe-specific constraints, effectively eliminating invalid TLP sequences. We validate Phantom's effectiveness by synthesizing TLP traces for an actual PCIe network interface card. Experimental results show that Phantom produces practical, large-scale TLP traces, significantly outperforming existing models, with improvements of up to 1000$\times$ in task-specific metrics and up to 2.19$\times$ in Fréchet Inception Distance (FID) compared to backbone-only methods. The prototype implementation has been made open-source. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2411_06376 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | The Phantom of PCIe: Constraining Generative Artificial Intelligences for Practical Peripherals Trace Synthesizing Huang, Zhibai Chen, Chen Yen, James Shen, Yihan Xie, Yongchen Wei, Zhixiang Xu, Kailiang Wang, Yun Liu, Fangxin Song, Tao Xia, Mingyuan Qi, Zhengwei Machine Learning Artificial Intelligence Hardware Architecture Peripheral Component Interconnect Express (PCIe) is the de facto interconnect standard for high-speed peripherals and CPUs. The development of PCIe devices for emerging applications requires realistic Transaction Layer Packet (TLP) traces that accurately simulate device-CPU interactions. While generative AI offers a promising avenue for synthesizing complex TLP sequences, it is prone to a critical challenge inherent in all generation tasks: hallucination. Naively applying these models often produces traces that violate fundamental PCIe protocol rules, such as ordering and causality, rendering them unusable for device simulation. To resolve this, our work introduces a methodology to bridge the gap between generative AI and high-fidelity device simulation. This paper presents Phantom, a framework that systematically addresses AI-generated hallucinations in TLP synthesis. Phantom achieves this by coupling a generative backbone with a novel post-processing filter that enforces PCIe-specific constraints, effectively eliminating invalid TLP sequences. We validate Phantom's effectiveness by synthesizing TLP traces for an actual PCIe network interface card. Experimental results show that Phantom produces practical, large-scale TLP traces, significantly outperforming existing models, with improvements of up to 1000$\times$ in task-specific metrics and up to 2.19$\times$ in Fréchet Inception Distance (FID) compared to backbone-only methods. The prototype implementation has been made open-source. |
| title | The Phantom of PCIe: Constraining Generative Artificial Intelligences for Practical Peripherals Trace Synthesizing |
| topic | Machine Learning Artificial Intelligence Hardware Architecture |
| url | https://arxiv.org/abs/2411.06376 |