Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Preprint |
| Published: |
2024
|
| Subjects: | |
| Online Access: | https://arxiv.org/abs/2411.08199 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866909386814783488 |
|---|---|
| author | Rizi, Mohamad Mahdi Rajaei Paramesh, Jeyanandh Entesari, Kamran |
| author_facet | Rizi, Mohamad Mahdi Rajaei Paramesh, Jeyanandh Entesari, Kamran |
| contents | This paper conducts a comprehensive system-level analysis of mm-Wave full-duplex transceivers, focusing on a receiver employing a four-stage self-interference cancellation (SIC) process. The analysis aims to optimize the noise and linearity performance requirements of each transceiver block, ensuring that the self-interference (SI) signal does not compromise the receiver's error vector magnitude (EVM) for an OFDM 64-QAM signal. Additionally, the necessary SIC for each stage is calculated to establish feasible noise and linearity specifications for a CMOS-based implementation. The resulting specifications are subsequently validated within a MATLAB Simulink environment, confirming the accuracy of the computed requirements for each block. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2411_08199 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | System-Level Analysis for mm-Wave Full-Duplex Transceivers Rizi, Mohamad Mahdi Rajaei Paramesh, Jeyanandh Entesari, Kamran Systems and Control This paper conducts a comprehensive system-level analysis of mm-Wave full-duplex transceivers, focusing on a receiver employing a four-stage self-interference cancellation (SIC) process. The analysis aims to optimize the noise and linearity performance requirements of each transceiver block, ensuring that the self-interference (SI) signal does not compromise the receiver's error vector magnitude (EVM) for an OFDM 64-QAM signal. Additionally, the necessary SIC for each stage is calculated to establish feasible noise and linearity specifications for a CMOS-based implementation. The resulting specifications are subsequently validated within a MATLAB Simulink environment, confirming the accuracy of the computed requirements for each block. |
| title | System-Level Analysis for mm-Wave Full-Duplex Transceivers |
| topic | Systems and Control |
| url | https://arxiv.org/abs/2411.08199 |