Reducing ADC Front-end Costs During Training of On-sensor Printed Multilayer Perceptrons
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arXiv
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| Main Authors: | Afentaki, Florentia, Duarte, Paula Carolina Lozano, Zervakis, Georgios, Tahoori, Mehdi B. |
|---|---|
| Format: | Preprint |
| Published: |
2024
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| Online Access: | |
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