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Systolic Arrays and Structured Pruning Co-design for Efficient Transformers in Edge Systems

Fuente: arXiv
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Bibliographic Details
Main Authors: Palacios, Pedro, Medina, Rafael, Rouas, Jean-Luc, Ansaloni, Giovanni, Atienza, David
Format: Preprint
Published: 2024
Subjects:
Hardware Architecture
Artificial Intelligence
68T50
C.3; B.5.1; I.2.7
Online Access:
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