Advancing Cloud Computing Capabilities on gem5 by Implementing the RISC-V Hypervisor Extension
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arXiv
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| Main Authors: | , , , |
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| Format: | Preprint |
| Published: |
2024
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| _version_ | 1866909396953464832 |
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| author | Fragkoulis, George-Marios Karystinos, Nikos Papadimitriou, George Gizopoulos, Dimitris |
| author_facet | Fragkoulis, George-Marios Karystinos, Nikos Papadimitriou, George Gizopoulos, Dimitris |
| contents | This paper presents the implementation and evaluation of the H (hypervisor) extension for the RISC-V instruction set architecture (ISA) on top of the gem5 microarchitectural simulator. The RISC-V ISA, known for its simplicity and modularity, has seen widespread adoption in various computing domains. The H extension aims to enhance RISC-V's capabilities for cloud computing and virtualization. In this paper, we present the architectural integration of the H extension into gem5, an open-source, modular platform for computer system architecture research. We detail the modifications required in gem5's CPU models and virtualization support to accommodate the H extension. We also present evaluation results regarding the performance impact and functional correctness of the extension's implementation on gem5. This study not only provides a pathway for further research and development of RISC-V extensions but also contributes valuable insights into the optimization of the gem5 simulator for advanced architectural features. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2411_12444 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Advancing Cloud Computing Capabilities on gem5 by Implementing the RISC-V Hypervisor Extension Fragkoulis, George-Marios Karystinos, Nikos Papadimitriou, George Gizopoulos, Dimitris Hardware Architecture This paper presents the implementation and evaluation of the H (hypervisor) extension for the RISC-V instruction set architecture (ISA) on top of the gem5 microarchitectural simulator. The RISC-V ISA, known for its simplicity and modularity, has seen widespread adoption in various computing domains. The H extension aims to enhance RISC-V's capabilities for cloud computing and virtualization. In this paper, we present the architectural integration of the H extension into gem5, an open-source, modular platform for computer system architecture research. We detail the modifications required in gem5's CPU models and virtualization support to accommodate the H extension. We also present evaluation results regarding the performance impact and functional correctness of the extension's implementation on gem5. This study not only provides a pathway for further research and development of RISC-V extensions but also contributes valuable insights into the optimization of the gem5 simulator for advanced architectural features. |
| title | Advancing Cloud Computing Capabilities on gem5 by Implementing the RISC-V Hypervisor Extension |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2411.12444 |