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| Main Authors: | , |
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| Format: | Preprint |
| Published: |
2024
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2412.01604 |
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| _version_ | 1866929629724409856 |
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| author | Oztas, Ali Emre Jelodari, Mahdi |
| author_facet | Oztas, Ali Emre Jelodari, Mahdi |
| contents | Our aim for the ML Contest for Chip Design with HLS 2024 was to predict the validity, running latency in the form of cycle counts, utilization rate of BRAM (util-BRAM), utilization rate of lookup tables (uti-LUT), utilization rate of flip flops (util-FF), and the utilization rate of digital signal processors (util-DSP). We used Chain-of-thought techniques with large language models to perform classification and regression tasks. Our prediction is that with larger models reasoning was much improved. We release our prompts and propose a HLS benchmarking task for LLMs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2412_01604 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Agentic-HLS: An agentic reasoning based high-level synthesis system using large language models (AI for EDA workshop 2024) Oztas, Ali Emre Jelodari, Mahdi Artificial Intelligence Hardware Architecture Our aim for the ML Contest for Chip Design with HLS 2024 was to predict the validity, running latency in the form of cycle counts, utilization rate of BRAM (util-BRAM), utilization rate of lookup tables (uti-LUT), utilization rate of flip flops (util-FF), and the utilization rate of digital signal processors (util-DSP). We used Chain-of-thought techniques with large language models to perform classification and regression tasks. Our prediction is that with larger models reasoning was much improved. We release our prompts and propose a HLS benchmarking task for LLMs. |
| title | Agentic-HLS: An agentic reasoning based high-level synthesis system using large language models (AI for EDA workshop 2024) |
| topic | Artificial Intelligence Hardware Architecture |
| url | https://arxiv.org/abs/2412.01604 |