MASIM: An Efficient Multi-Array Scheduler for In-Memory SIMD Computation

Fuente: arXiv
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Main Authors: Qian, Xingyue, Nie, Chen, He, Zhezhi, Qian, Weikang
Format: Preprint
Published: 2024
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author Qian, Xingyue
Nie, Chen
He, Zhezhi
Qian, Weikang
author_facet Qian, Xingyue
Nie, Chen
He, Zhezhi
Qian, Weikang
contents Single instruction, multiple data (SIMD) is a popular design style of in-memory computing (IMC) architectures, which enables memory arrays to perform logic operations to achieve low energy consumption and high parallelism. To implement a target function on the data stored in memory, the function is first transformed into a netlist of the supported logic operations through logic synthesis. Then, the scheduler transforms the netlist into the instruction sequence given to the architecture. An instruction is either computing a logic operation in the netlist or copying the data from one array to another. Most existing schedulers focus on optimizing the execution sequence of the operations to minimize the number of memory rows needed, neglecting the energy-consuming copy instructions, which cannot be avoided when working with arrays with limited sizes. In this work, our goal is to reduce the number of copy instructions to decrease overall energy consumption. We propose MASIM, a multi-array scheduler for in-memory SIMD computation. It consists of a priority-driven scheduling algorithm and an iterative improvement process. Compared to the best state-of-the-art scheduler, MASIM reduces the number of copy instructions by 63.2% on average, which leads to a 28.0% reduction in energy.
format Preprint
id arxiv_https___arxiv_org_abs_2412_02218
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle MASIM: An Efficient Multi-Array Scheduler for In-Memory SIMD Computation
Qian, Xingyue
Nie, Chen
He, Zhezhi
Qian, Weikang
Emerging Technologies
Hardware Architecture
Single instruction, multiple data (SIMD) is a popular design style of in-memory computing (IMC) architectures, which enables memory arrays to perform logic operations to achieve low energy consumption and high parallelism. To implement a target function on the data stored in memory, the function is first transformed into a netlist of the supported logic operations through logic synthesis. Then, the scheduler transforms the netlist into the instruction sequence given to the architecture. An instruction is either computing a logic operation in the netlist or copying the data from one array to another. Most existing schedulers focus on optimizing the execution sequence of the operations to minimize the number of memory rows needed, neglecting the energy-consuming copy instructions, which cannot be avoided when working with arrays with limited sizes. In this work, our goal is to reduce the number of copy instructions to decrease overall energy consumption. We propose MASIM, a multi-array scheduler for in-memory SIMD computation. It consists of a priority-driven scheduling algorithm and an iterative improvement process. Compared to the best state-of-the-art scheduler, MASIM reduces the number of copy instructions by 63.2% on average, which leads to a 28.0% reduction in energy.
title MASIM: An Efficient Multi-Array Scheduler for In-Memory SIMD Computation
topic Emerging Technologies
Hardware Architecture
url https://arxiv.org/abs/2412.02218