Mr.TPL: A Method for Multi-Pin Net Router in Triple Patterning Lithography
Fuente:
arXiv
Enregistré dans:
| Auteurs principaux: | , , , , , |
|---|---|
| Format: | Preprint |
| Publié: |
2024
|
| Sujets: | |
| Accès en ligne: | |
| Tags: |
Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!
|
| _version_ | 1866908789148483584 |
|---|---|
| author | Wang, Chengkai Ji, Weiqing Kou, Mingyang Chen, Zhiyang Li, Fei Yao, Hailong |
| author_facet | Wang, Chengkai Ji, Weiqing Kou, Mingyang Chen, Zhiyang Li, Fei Yao, Hailong |
| contents | Triple patterning lithography (TPL) has been recognized as one of the most promising solutions to print critical features in advanced technology nodes. A critical challenge within TPL is the effective assignment of the layout to masks. Recently, various layout decomposition methods and TPL-aware routing methods have been proposed to consider TPL. However, these methods typically result in numerous conflicts and stitches, and are mainly designed for 2-pin nets. This paper proposes a multi-pin net routing method in triple patterning lithography, called Mr.TPL. Experimental results demonstrate that Mr.TPL reduces color conflicts by 81.17%, decreases stitches by 76.89%, and achieves up to 5.4X speed improvement compared to the state-of-the-art TPL-aware routing method. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2412_02703 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Mr.TPL: A Method for Multi-Pin Net Router in Triple Patterning Lithography Wang, Chengkai Ji, Weiqing Kou, Mingyang Chen, Zhiyang Li, Fei Yao, Hailong Other Computer Science Triple patterning lithography (TPL) has been recognized as one of the most promising solutions to print critical features in advanced technology nodes. A critical challenge within TPL is the effective assignment of the layout to masks. Recently, various layout decomposition methods and TPL-aware routing methods have been proposed to consider TPL. However, these methods typically result in numerous conflicts and stitches, and are mainly designed for 2-pin nets. This paper proposes a multi-pin net routing method in triple patterning lithography, called Mr.TPL. Experimental results demonstrate that Mr.TPL reduces color conflicts by 81.17%, decreases stitches by 76.89%, and achieves up to 5.4X speed improvement compared to the state-of-the-art TPL-aware routing method. |
| title | Mr.TPL: A Method for Multi-Pin Net Router in Triple Patterning Lithography |
| topic | Other Computer Science |
| url | https://arxiv.org/abs/2412.02703 |