Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems
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arXiv
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| Auteurs principaux: | , , |
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| Format: | Preprint |
| Publié: |
2024
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| _version_ | 1866909420618776576 |
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| author | Gundawar, Ayush Chung, Euijun Kim, Hyesoon |
| author_facet | Gundawar, Ayush Chung, Euijun Kim, Hyesoon |
| contents | The exponential growth of data-intensive machine learning workloads has exposed significant limitations in conventional GPU-accelerated systems, especially when processing datasets exceeding GPU DRAM capacity. We propose MQMS, an augmented in-storage GPU architecture and simulator that is aware of internal SSD states and operations, enabling intelligent scheduling and address allocation to overcome performance bottlenecks caused by CPU-mediated data access patterns. MQMS introduces dynamic address allocation to maximize internal parallelism and fine-grained address mapping to efficiently handle small I/O requests without incurring read-modify-write overheads. Through extensive evaluations on workloads ranging from large language model inference to classical machine learning algorithms, MQMS demonstrates orders-of-magnitude improvements in I/O request throughput, device response time, and simulation end time compared to existing simulators. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2412_04569 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems Gundawar, Ayush Chung, Euijun Kim, Hyesoon Hardware Architecture The exponential growth of data-intensive machine learning workloads has exposed significant limitations in conventional GPU-accelerated systems, especially when processing datasets exceeding GPU DRAM capacity. We propose MQMS, an augmented in-storage GPU architecture and simulator that is aware of internal SSD states and operations, enabling intelligent scheduling and address allocation to overcome performance bottlenecks caused by CPU-mediated data access patterns. MQMS introduces dynamic address allocation to maximize internal parallelism and fine-grained address mapping to efficiently handle small I/O requests without incurring read-modify-write overheads. Through extensive evaluations on workloads ranging from large language model inference to classical machine learning algorithms, MQMS demonstrates orders-of-magnitude improvements in I/O request throughput, device response time, and simulation end time compared to existing simulators. |
| title | Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2412.04569 |