Sequential Printed MLP Circuits for Super TinyML Multi-Sensory Applications

Fuente: arXiv
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Hauptverfasser: Saglam, Gurol, Afentaki, Florentia, Zervakis, Georgios, Tahoori, Mehdi B.
Format: Preprint
Veröffentlicht: 2024
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author Saglam, Gurol
Afentaki, Florentia
Zervakis, Georgios
Tahoori, Mehdi B.
author_facet Saglam, Gurol
Afentaki, Florentia
Zervakis, Georgios
Tahoori, Mehdi B.
contents Super-TinyML aims to optimize machine learning models for deployment on ultra-low-power application domains such as wearable technologies and implants. Such domains also require conformality, flexibility, and non-toxicity which traditional silicon-based systems cannot fulfill. Printed Electronics (PE) offers not only these characteristics, but also cost-effective and on-demand fabrication. However, Neural Networks (NN) with hundreds of features -- often necessary for target applications -- have not been feasible in PE because of its restrictions such as limited device count due to its large feature sizes. In contrast to the state of the art using fully parallel architectures and limited to smaller classifiers, in this work we implement a super-TinyML architecture for bespoke (application-specific) NNs that surpasses the previous limits of state of the art and enables NNs with large number of parameters. With the introduction of super-TinyML into PE technology, we address the area and power limitations through resource sharing with multi-cycle operation and neuron approximation. This enables, for the first time, the implementation of NNs with up to $35.9\times$ more features and $65.4\times$ more coefficients than the state of the art solutions.
format Preprint
id arxiv_https___arxiv_org_abs_2412_06542
institution arXiv
publishDate 2024
record_format arxiv
spellingShingle Sequential Printed MLP Circuits for Super TinyML Multi-Sensory Applications
Saglam, Gurol
Afentaki, Florentia
Zervakis, Georgios
Tahoori, Mehdi B.
Hardware Architecture
Super-TinyML aims to optimize machine learning models for deployment on ultra-low-power application domains such as wearable technologies and implants. Such domains also require conformality, flexibility, and non-toxicity which traditional silicon-based systems cannot fulfill. Printed Electronics (PE) offers not only these characteristics, but also cost-effective and on-demand fabrication. However, Neural Networks (NN) with hundreds of features -- often necessary for target applications -- have not been feasible in PE because of its restrictions such as limited device count due to its large feature sizes. In contrast to the state of the art using fully parallel architectures and limited to smaller classifiers, in this work we implement a super-TinyML architecture for bespoke (application-specific) NNs that surpasses the previous limits of state of the art and enables NNs with large number of parameters. With the introduction of super-TinyML into PE technology, we address the area and power limitations through resource sharing with multi-cycle operation and neuron approximation. This enables, for the first time, the implementation of NNs with up to $35.9\times$ more features and $65.4\times$ more coefficients than the state of the art solutions.
title Sequential Printed MLP Circuits for Super TinyML Multi-Sensory Applications
topic Hardware Architecture
url https://arxiv.org/abs/2412.06542