AIRCHITECT v2: Learning the Hardware Accelerator Design Space through Unified Representations

Documenti analoghi

• MicroScopiQ: Accelerating Foundational Models through Outlier-Aware Microscaling Quantization
  di: Ramachandran, Akshat, et al.
  Pubblicazione: (2024)
• FEATHER: A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  di: Tong, Jianming, et al.
  Pubblicazione: (2024)
• Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN Inference
  di: Ramachandran, Akshat, et al.
  Pubblicazione: (2024)
• Accelerating LLM Inference with Flexible N:M Sparsity via A Fully Digital Compute-in-Memory Accelerator
  di: Ramachandran, Akshat, et al.
  Pubblicazione: (2025)
• OneDSE: A Unified Microprocessor Metric Prediction and Design Space Exploration Framework
  di: Raj, Ritik, et al.
  Pubblicazione: (2025)