:: Library Catalog

Cover Image

Saved in:

Bibliographic Details
Main Authors:	Tageldeen, Momen K, Belgaid, Yacine, Mohan, Vivek, Wang, Zhou, Drakakis, Emmanuel M
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture Artificial Intelligence
Online Access:	https://arxiv.org/abs/2501.13181
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Exploring the Potential of Wireless-enabled Multi-Chip AI Accelerators
by: Irabor, Emmanuel, et al.
Published: (2025)

AI-Powered Agile Analog Circuit Design and Optimization
by: Hu, Jinhai, et al.
Published: (2025)

A Fully Hardware Implemented Accelerator Design in ReRAM Analog Computing without ADCs
by: Dang, Peng, et al.
Published: (2024)

Analogous Alignments: Digital "Formally" meets Analog
by: Mohanty, Hansa, et al.
Published: (2024)

AnalogSeeker: An Open-source Foundation Language Model for Analog Circuit Design
by: Chen, Zihao, et al.
Published: (2025)

J3DAI: A tiny DNN-Based Edge AI Accelerator for 3D-Stacked CMOS Image Sensor
by: Tain, Benoit, et al.
Published: (2025)

Chiplet-Based RISC-V SoC with Modular AI Acceleration
by: Bharadwaj, Suhas Suresh, et al.
Published: (2025)

IMAGINE: An 8-to-1b 22nm FD-SOI Compute-In-Memory CNN Accelerator With an End-to-End Analog Charge-Based 0.15-8POPS/W Macro Featuring Distribution-Aware Data Reshaping
by: Kneip, Adrian, et al.
Published: (2024)

A3D: Agentic AI flow for autonomous Accelerator Design
by: Nallathambi, Abinand, et al.
Published: (2026)

Using the Abstract Computer Architecture Description Language to Model AI Hardware Accelerators
by: Müller, Mika Markus, et al.
Published: (2024)

Accelerating GenAI Workloads by Enabling RISC-V Microkernel Support in IREE
by: Ahmad, Adeel, et al.
Published: (2025)

MICSim: A Modular Simulator for Mixed-signal Compute-in-Memory based AI Accelerator
by: Wang, Cong, et al.
Published: (2024)

ApproXAI: Energy-Efficient Hardware Acceleration of Explainable AI using Approximate Computing
by: Siddique, Ayesha, et al.
Published: (2025)

Architectural Design and Performance Analysis of FPGA based AI Accelerators: A Comprehensive Review
by: Chatterjee, Soumita, et al.
Published: (2026)

Late Breaking Results: Breaking Symmetry- Unconventional Placement of Analog Circuits using Multi-Level Multi-Agent Reinforcement Learning
by: Maji, Supriyo, et al.
Published: (2025)

FPGA-Based Neural Network Accelerators for Space Applications: A Survey
by: Antunes, Pedro, et al.
Published: (2025)

Sustainable AI Processing at the Edge
by: Ollivier, Sébastien, et al.
Published: (2022)

A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures
by: Curzel, Serena, et al.
Published: (2023)

Sangam: Chiplet-Based DRAM-PIM Accelerator with CXL Integration for LLM Inferencing
by: Kiyawat, Khyati, et al.
Published: (2025)

A Self-Calibrating Framework for Analog Circuit Sizing Using LLM-Derived Analytical Equations
by: Bujana, Antonio J., et al.
Published: (2026)

HEANA: A Hybrid Time-Amplitude Analog Optical Accelerator with Flexible Dataflows for Energy-Efficient CNN Inference
by: Vatsavai, Sairam Sri, et al.
Published: (2024)

Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators
by: Vellaisamy, Prabhu, et al.
Published: (2026)

Embedded FPGA Acceleration of Brain-Like Neural Networks: Online Learning to Scalable Inference
by: Hafiz, Muhammad Ihsan Al, et al.
Published: (2025)

EdgeCIM: A Hardware-Software Co-Design for CIM-Based Acceleration of Small Language Models
by: Bazzi, Jinane, et al.
Published: (2026)

Optimizing Neural Networks with Learnable Non-Linear Activation Functions via Lookup-Based FPGA Acceleration
by: Yin, Mengyuan, et al.
Published: (2025)

Characterizing Soft-Error Resiliency in Arm's Ethos-U55 Embedded Machine Learning Accelerator
by: Tyagi, Abhishek, et al.
Published: (2024)

AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Design
by: Mehradfar, Asal, et al.
Published: (2024)

Idle is the New Sleep: Configuration-Aware Alternative to Powering Off FPGA-Based DL Accelerators During Inactivity
by: Qian, Chao, et al.
Published: (2024)

Supervised Learning for Analog and RF Circuit Design: Benchmarks and Comparative Insights
by: Mehradfar, Asal, et al.
Published: (2025)

Dynamic Gradient Sparse Update for Edge Training
by: Li, I-Hsuan, et al.
Published: (2025)

ElasticAI: Creating and Deploying Energy-Efficient Deep Learning Accelerator for Pervasive Computing
by: Qian, Chao, et al.
Published: (2024)

Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithms
by: Wang, Zhihai, et al.
Published: (2024)

MARCA: Mamba Accelerator with ReConfigurable Architecture
by: Li, Jinhao, et al.
Published: (2024)

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models
by: Zhang, Haoyi, et al.
Published: (2024)

Extending Straight-Through Estimation for Robust Neural Networks on Analog CIM Hardware
by: Feng, Yuannuo, et al.
Published: (2025)

Hardware Acceleration of LLMs: A comprehensive survey and comparison
by: Koilia, Nikoletta, et al.
Published: (2024)

BETA: Binarized Energy-Efficient Transformer Accelerator at the Edge
by: Ji, Yuhao, et al.
Published: (2024)

LLM-DSE: Searching Accelerator Parameters with LLM Agents
by: Wang, Hanyu, et al.
Published: (2025)

StoX-Net: Stochastic Processing of Partial Sums for Efficient In-Memory Computing DNN Accelerators
by: Rogers, Ethan G, et al.
Published: (2024)

LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generation
by: Chang, Chen-Chia, et al.
Published: (2025)