Cover Image

Increasing the Energy-Efficiency of Wearables Using Low-Precision Posit Arithmetic with PHEE

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Mallasén, David, Schiavone, Pasquale Davide, Del Barrio, Alberto A., Prieto-Matias, Manuel, Atienza, David
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing
by: Mallasén, David, et al.
Published: (2023)

X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller for the Exploration of Ultra-Low-Power Edge Accelerators
by: Machetti, Simone, et al.
Published: (2024)

X-HEEP: An Open-Source, Configurable and Extendible RISC-V Platform for TinyAI Applications
by: Machetti, Simone, et al.
Published: (2025)

e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications
by: Machetti, Simone, et al.
Published: (2025)

Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes
by: Caon, Michele, et al.
Published: (2024)

Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications
by: Cammarata, Danilo, et al.
Published: (2025)

Just TestIt! An SBST Approach To Automate System-Integration Testing
by: Terzano, Tommaso, et al.
Published: (2025)

MetaWearS: A Shortcut in Wearable Systems Lifecycle with Only a Few Shots
by: Amirshahi, Alireza, et al.
Published: (2024)

STRELA: STReaming ELAstic CGRA Accelerator for Embedded Systems
by: Vazquez, Daniel, et al.
Published: (2024)

Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA
by: Carpentieri, Nicolò, et al.
Published: (2024)

Digit-Recurrence Posit Division
by: Murillo, Raul, et al.
Published: (2025)

HEEPidermis: a versatile SoC for BioZ recording
by: Sapriza, Juan, et al.
Published: (2025)

ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions
by: Petrolo, Vincenzo, et al.
Published: (2025)

Mitigating the Bandwidth Wall via Data-Streaming System-Accelerator Co-Design
by: Liu, Qunyou, et al.
Published: (2026)

MatrixFlow: System-Accelerator co-design for high-performance transformer applications
by: Liu, Qunyou, et al.
Published: (2025)

How to Increase Energy Efficiency with a Single Linux Command
by: Jelvani, Alborz, et al.
Published: (2025)

TATAA: Programmable Mixed-Precision Transformer Acceleration with a Transformable Arithmetic Architecture
by: Wu, Jiajun, et al.
Published: (2024)

Gem5-AcceSys: Enabling System-Level Exploration of Standard Interconnects for Novel Accelerators
by: Liu, Qunyou, et al.
Published: (2025)

VCO-CARE: VCO-based Calibration-free Analog Readout for Electrodermal activity sensing
by: Alvero-Gonzalez, Leidy Mabel, et al.
Published: (2025)

Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators
by: Vellaisamy, Prabhu, et al.
Published: (2026)

Enable Lightweight and Precision-Scalable Posit/IEEE-754 Arithmetic in RISC-V Cores for Transprecision Computing
by: Li, Qiong, et al.
Published: (2025)

CXLRAMSim v1.0: System-Level Exploration of CXL Memory Expander Cards
by: Pathak, Karan, et al.
Published: (2026)

Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
by: Fu, Zexin, et al.
Published: (2025)

Closing the Gap Between Float and Posit Hardware Efficiency
by: Jonnalagadda, Aditya Anirudh, et al.
Published: (2026)

Modeling PFAS in Semiconductor Manufacturing to Quantify Trade-offs in Energy Efficiency and Environmental Impact of Computing Systems
by: Elgamal, Mariam, et al.
Published: (2025)

LFOC+: A Fair OS-level Cache-Clustering Policy for Commodity Multicore Systems
by: Saez, Juan Carlos, et al.
Published: (2024)

GeneTEK: Low-power, high-performance and scalable FPGA architecture for exact unit-cost edit distance
by: Espinosa, Elena, et al.
Published: (2025)

Exploiting pre-optimized kernels with polyhedral transformations for CGRA compilation
by: Wang, Yuxuan, et al.
Published: (2026)

Low-power, Energy-efficient, Cardiologist-level Atrial Fibrillation Detection for Wearable Devices
by: Loroch, Dominik, et al.
Published: (2025)

MEDEA: A Design-Time Multi-Objective Manager for Energy-Efficient DNN Inference on Heterogeneous Ultra-Low Power Platforms
by: Taji, Hossein, et al.
Published: (2025)

SigmaQuant: Hardware-Aware Heterogeneous Quantization Method for Edge DNN Inference
by: Liu, Qunyou, et al.
Published: (2026)

Optimizing Energy Efficiency in Subthreshold RISC-V Cores
by: Djupdal, Asbjørn, et al.
Published: (2025)

An Energy-Efficient Approximate Posit Multiply-Divide Unit
by: Thotli, Rishi, et al.
Published: (2026)

Designing Approximate Arithmetic Circuits with Combined Error Constraints
by: Češka, Milan, et al.
Published: (2022)

Combining Power and Arithmetic Optimization via Datapath Rewriting
by: Coward, Samuel, et al.
Published: (2024)

Invited Paper: FEMU: An Open-Source and Configurable Emulation Framework for Prototyping TinyAI Heterogeneous Systems
by: Machetti, Simone, et al.
Published: (2025)

A Stochastic Rounding-Enabled Low-Precision Floating-Point MAC for DNN Training
by: Ali, Sami Ben, et al.
Published: (2024)

HPR-Mul: An Area and Energy-Efficient High-Precision Redundancy Multiplier by Approximate Computing
by: Vafaei, Jafar, et al.
Published: (2024)

Virgo: Cluster-level Matrix Unit Integration in GPUs for Scalability and Energy Efficiency
by: Kim, Hansung, et al.
Published: (2024)

SSD Offloading for LLM Mixture-of-Experts Weights Considered Harmful in Energy Efficiency
by: Kyung, Kwanhee, et al.
Published: (2025)