StruM: Structured Mixed Precision for Efficient Deep Learning Hardware Codesign

Fuente: arXiv
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Main Authors: Wu, Michael, Raha, Arnab, Mathaikutty, Deepak A., Langhammer, Martin, Tunali, Engin, Sharma, Daksha
Format: Preprint
Published: 2025
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author Wu, Michael
Raha, Arnab
Mathaikutty, Deepak A.
Langhammer, Martin
Tunali, Engin
Sharma, Daksha
author_facet Wu, Michael
Raha, Arnab
Mathaikutty, Deepak A.
Langhammer, Martin
Tunali, Engin
Sharma, Daksha
contents In this paper, we propose StruM, a novel structured mixed-precision-based deep learning inference method, co-designed with its associated hardware accelerator (DPU), to address the escalating computational and memory demands of deep learning workloads in data centers and edge applications. Diverging from traditional approaches, our method avoids time-consuming re-training/fine-tuning and specialized hardware access. By leveraging the variance in weight magnitudes within layers, we quantize values within blocks to two different levels, achieving up to a 50% reduction in precision for 8-bit integer weights to 4-bit values across various Convolutional Neural Networks (CNNs) with negligible loss in inference accuracy. To demonstrate efficiency gains by utilizing mixed precision, we implement StruM on top of our in-house FlexNN DNN accelerator [1] that supports low and mixed-precision execution. Experimental results depict that the proposed StruM-based hardware architecture achieves a 31-34% reduction in processing element (PE) power consumption and a 10% reduction in area at the accelerator level. In addition, the statically configured StruM results in 23-26% area reduction at the PE level and 2-3% area savings at the DPU level.
format Preprint
id arxiv_https___arxiv_org_abs_2501_18953
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle StruM: Structured Mixed Precision for Efficient Deep Learning Hardware Codesign
Wu, Michael
Raha, Arnab
Mathaikutty, Deepak A.
Langhammer, Martin
Tunali, Engin
Sharma, Daksha
Hardware Architecture
In this paper, we propose StruM, a novel structured mixed-precision-based deep learning inference method, co-designed with its associated hardware accelerator (DPU), to address the escalating computational and memory demands of deep learning workloads in data centers and edge applications. Diverging from traditional approaches, our method avoids time-consuming re-training/fine-tuning and specialized hardware access. By leveraging the variance in weight magnitudes within layers, we quantize values within blocks to two different levels, achieving up to a 50% reduction in precision for 8-bit integer weights to 4-bit values across various Convolutional Neural Networks (CNNs) with negligible loss in inference accuracy. To demonstrate efficiency gains by utilizing mixed precision, we implement StruM on top of our in-house FlexNN DNN accelerator [1] that supports low and mixed-precision execution. Experimental results depict that the proposed StruM-based hardware architecture achieves a 31-34% reduction in processing element (PE) power consumption and a 10% reduction in area at the accelerator level. In addition, the statically configured StruM results in 23-26% area reduction at the PE level and 2-3% area savings at the DPU level.
title StruM: Structured Mixed Precision for Efficient Deep Learning Hardware Codesign
topic Hardware Architecture
url https://arxiv.org/abs/2501.18953