Accelerating PageRank Algorithmic Tasks with a new Programmable Hardware Architecture
Fuente:
arXiv
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Preprint |
| Published: |
2024
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866912874018897920 |
|---|---|
| author | Chowdhury, Md Rownak Hossain Rahman, Mostafizur |
| author_facet | Chowdhury, Md Rownak Hossain Rahman, Mostafizur |
| contents | Addressing the growing demands of artificial intelligence (AI) and data analytics requires new computing approaches. In this paper, we propose a reconfigurable hardware accelerator designed specifically for AI and data-intensive applications. Our architecture features a messaging-based intelligent computing scheme that allows for dynamic programming at runtime using a minimal instruction set. To assess our hardware's effectiveness, we conducted a case study in TSMC 28nm technology node. The simulation-based study involved analyzing a protein network using the computationally demanding PageRank algorithm. The results demonstrate that our hardware can analyze a 5,000-node protein network in just 213.6 milliseconds over 100 iterations. These outcomes signify the potential of our design to achieve cutting-edge performance in next-generation AI applications. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2502_00001 |
| institution | arXiv |
| publishDate | 2024 |
| record_format | arxiv |
| spellingShingle | Accelerating PageRank Algorithmic Tasks with a new Programmable Hardware Architecture Chowdhury, Md Rownak Hossain Rahman, Mostafizur Hardware Architecture Addressing the growing demands of artificial intelligence (AI) and data analytics requires new computing approaches. In this paper, we propose a reconfigurable hardware accelerator designed specifically for AI and data-intensive applications. Our architecture features a messaging-based intelligent computing scheme that allows for dynamic programming at runtime using a minimal instruction set. To assess our hardware's effectiveness, we conducted a case study in TSMC 28nm technology node. The simulation-based study involved analyzing a protein network using the computationally demanding PageRank algorithm. The results demonstrate that our hardware can analyze a 5,000-node protein network in just 213.6 milliseconds over 100 iterations. These outcomes signify the potential of our design to achieve cutting-edge performance in next-generation AI applications. |
| title | Accelerating PageRank Algorithmic Tasks with a new Programmable Hardware Architecture |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2502.00001 |