Pushing the Limits of BFP on Narrow Precision LLM Inference
Fuente:
arXiv
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| Autori principali: | , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2025
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| _version_ | 1866916602482524160 |
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| author | Wang, Hui Cheng, Yuan Han, Xiaomeng Zhao, Zhengpeng Yang, Dawei Jiang, Zhe |
| author_facet | Wang, Hui Cheng, Yuan Han, Xiaomeng Zhao, Zhengpeng Yang, Dawei Jiang, Zhe |
| contents | The substantial computational and memory demands of Large Language Models (LLMs) hinder their deployment. Block Floating Point (BFP) has proven effective in accelerating linear operations, a cornerstone of LLM workloads. However, as sequence lengths grow, nonlinear operations, such as Attention, increasingly become performance bottlenecks due to their quadratic computational complexity. These nonlinear operations are predominantly executed using inefficient floating-point formats, which renders the system challenging to optimize software efficiency and hardware overhead. In this paper, we delve into the limitations and potential of applying BFP to nonlinear operations. Given our findings, we introduce a hardware-software co-design framework (DB-Attn), including: (i) DBFP, an advanced BFP version, overcomes nonlinear operation challenges with a pivot-focus strategy for diverse data and an adaptive grouping strategy for flexible exponent sharing. (ii) DH-LUT, a novel lookup table algorithm dedicated to accelerating nonlinear operations with DBFP format. (iii) An RTL-level DBFP-based engine is implemented to support DB-Attn, applicable to FPGA and ASIC. Results show that DB-Attn provides significant performance improvements with negligible accuracy loss, achieving 74% GPU speedup on Softmax of LLaMA and 10x low overhead performance improvement over SOTA designs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2502_00026 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Pushing the Limits of BFP on Narrow Precision LLM Inference Wang, Hui Cheng, Yuan Han, Xiaomeng Zhao, Zhengpeng Yang, Dawei Jiang, Zhe Hardware Architecture Artificial Intelligence The substantial computational and memory demands of Large Language Models (LLMs) hinder their deployment. Block Floating Point (BFP) has proven effective in accelerating linear operations, a cornerstone of LLM workloads. However, as sequence lengths grow, nonlinear operations, such as Attention, increasingly become performance bottlenecks due to their quadratic computational complexity. These nonlinear operations are predominantly executed using inefficient floating-point formats, which renders the system challenging to optimize software efficiency and hardware overhead. In this paper, we delve into the limitations and potential of applying BFP to nonlinear operations. Given our findings, we introduce a hardware-software co-design framework (DB-Attn), including: (i) DBFP, an advanced BFP version, overcomes nonlinear operation challenges with a pivot-focus strategy for diverse data and an adaptive grouping strategy for flexible exponent sharing. (ii) DH-LUT, a novel lookup table algorithm dedicated to accelerating nonlinear operations with DBFP format. (iii) An RTL-level DBFP-based engine is implemented to support DB-Attn, applicable to FPGA and ASIC. Results show that DB-Attn provides significant performance improvements with negligible accuracy loss, achieving 74% GPU speedup on Softmax of LLaMA and 10x low overhead performance improvement over SOTA designs. |
| title | Pushing the Limits of BFP on Narrow Precision LLM Inference |
| topic | Hardware Architecture Artificial Intelligence |
| url | https://arxiv.org/abs/2502.00026 |