Image de couverture de livre

DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale

Fuente: arXiv

Enregistré dans:

Détails bibliographiques
Auteurs principaux:	Zheng, Ziyang, Huang, Shan, Zhong, Jianyuan, Shi, Zhengyuan, Dai, Guohao, Xu, Ningyi, Xu, Qiang
Format:	Preprint
Publié:	2025
Sujets:	Machine Learning Hardware Architecture
Accès en ligne:	Acceder al recurso
Tags:	Ajouter un tag Pas de tags, Soyez le premier à ajouter un tag!

Documents similaires

DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations
par: Khan, Sadaf, et autres
Publié: (2024)

DeepGate3: Towards Scalable Circuit Representation Learning
par: Shi, Zhengyuan, et autres
Publié: (2024)

MARCA: Mamba Accelerator with ReConfigurable Architecture
par: Li, Jinhao, et autres
Publié: (2024)

CktEvo: Repository-Level RTL Code Benchmark for Design Evolution
par: Shi, Zhengyuan, et autres
Publié: (2026)

AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models
par: Xue, Chenhao, et autres
Publié: (2025)

Speculative Decoding for Verilog: Speed and Quality, All in One
par: Xu, Changran, et autres
Publié: (2025)

CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design
par: Fang, Wenji, et autres
Publié: (2025)

DeepRTL2: A Versatile Model for RTL-Related Tasks
par: Liu, Yi, et autres
Publié: (2025)

OptGM: An Optimized Gate Merging Method to Mitigate NBTI in Digital Circuits
par: Hajisadeghi, Amir M., et autres
Publié: (2025)

ReGate: Enabling Power Gating in Neural Processing Units
par: Xue, Yuqi, et autres
Publié: (2025)

SRAM-PG: Power Delivery Network Benchmarks from SRAM Circuits
par: Shen, Shan, et autres
Publié: (2024)

ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDA
par: Shi, Zhengyuan, et autres
Publié: (2025)

Learning-driven Physically-aware Large-scale Circuit Gate Sizing
par: Ye, Yuyang, et autres
Publié: (2024)

Designing Approximate Arithmetic Circuits with Combined Error Constraints
par: Češka, Milan, et autres
Publié: (2022)

Theseus: Exploring Efficient Wafer-Scale Chip Design for Large Language Models
par: Zhu, Jingchen, et autres
Publié: (2024)

LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automation
par: Zhong, Ruizhe, et autres
Publié: (2023)

Field-Programmable Gate Array Architecture for Deep Learning: Survey & Future Directions
par: Boutros, Andrew, et autres
Publié: (2024)

AnalogSeeker: An Open-source Foundation Language Model for Analog Circuit Design
par: Chen, Zihao, et autres
Publié: (2025)

Synthesis of Resource-Efficient Superconducting Circuits with Clock-Free Alternating Logic
par: Volk, Jennifer, et autres
Publié: (2024)

DeepRTL: Bridging Verilog Understanding and Generation with a Unified Representation Model
par: Liu, Yi, et autres
Publié: (2025)

NASiC: 3D NAND-based CAM-Selected Multibit CIM Architecture for Efficient On-Device Mixture-of-Experts LLM Inference
par: Xu, Weikai, et autres
Publié: (2026)

Circuit Diagram Retrieval Based on Hierarchical Circuit Graph Representation
par: Gao, Ming, et autres
Publié: (2025)

The Dawn of AI-Native EDA: Opportunities and Challenges of Large Circuit Models
par: Chen, Lei, et autres
Publié: (2024)

FastCaps: A Design Methodology for Accelerating Capsule Network on Field Programmable Gate Arrays
par: Rahoof, Abdul, et autres
Publié: (2025)

Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AI
par: Bhandari, Jitendra, et autres
Publié: (2024)

Large Language Model Inference Acceleration: A Comprehensive Hardware Perspective
par: Li, Jinhao, et autres
Publié: (2024)

UniCAIM: A Unified CAM/CIM Architecture with Static-Dynamic KV Cache Pruning for Efficient Long-Context LLM Inference
par: Xu, Weikai, et autres
Publié: (2025)

DiffuSE: Cross-Layer Design Space Exploration of DNN Accelerator via Diffusion-Driven Optimization
par: Ren, Yi, et autres
Publié: (2025)

Reuse and Blend: Energy-Efficient Optical Neural Network Enabled by Weight Sharing
par: Xu, Bo, et autres
Publié: (2024)

Efficient yet Accurate End-to-End SC Accelerator Design
par: Li, Meng, et autres
Publié: (2024)

AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis
par: Li, Jintao, et autres
Publié: (2024)

ShortCircuit: AlphaZero-Driven Circuit Design
par: Tsaras, Dimitrios, et autres
Publié: (2024)

Theoretical Analysis of the Efficient-Memory Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs
par: Le, Tran Xuan Hieu, et autres
Publié: (2024)

DEFA: Efficient Deformable Attention Acceleration via Pruning-Assisted Grid-Sampling and Multi-Scale Parallel Processing
par: Xu, Yansong, et autres
Publié: (2024)

A Hardware-Aware Gate Cutting Framework for Practical Quantum Circuit Knitting
par: Ren, Xiangyu, et autres
Publié: (2024)

CircuitVAE: Efficient and Scalable Latent Circuit Optimization
par: Song, Jialin, et autres
Publié: (2024)

FormalRTL: Verified RTL Synthesis at Scale
par: Li, Kezhi, et autres
Publié: (2026)

RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization with Knowledge-infused Reinforcement Learning
par: Cao, Weidong, et autres
Publié: (2024)

COmPOSER: Circuit Optimization of mm-wave/RF circuits with Performance-Oriented Synthesis for Efficient Realizations
par: Ghosh, Subhadip, et autres
Publié: (2026)

TRACE: Unlocking Effective CXL Bandwidth via Lossless Compression and Precision Scaling
par: Xie, Rui, et autres
Publié: (2025)