Random Adaptive Cache Placement Policy

Fuente: arXiv
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Bibliographic Details
Main Authors: Ahire, Vrushank, Menon, Pranav, Muley, Aniruddh, Prasad, Abhinandan S.
Format: Preprint
Published: 2025
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author Ahire, Vrushank
Menon, Pranav
Muley, Aniruddh
Prasad, Abhinandan S.
author_facet Ahire, Vrushank
Menon, Pranav
Muley, Aniruddh
Prasad, Abhinandan S.
contents This paper presents a new hybrid cache replacement algorithm that combines random allocation with a modified V-Way cache implementation. Our RAC adapts to complex cache access patterns and optimizes cache usage by improving the utilization of cache sets, unlike traditional cache policies. The algorithm utilizes a 16-way set-associative cache with 2048 sets, incorporating dynamic allocation and flexible tag management. RAC extends the V-Way cache design and its variants by optimizing tag and data storage for enhanced efficiency. We evaluated the algorithm using the ChampSim simulator with four diverse benchmark traces and observed significant improvements in cache hit rates up to 80.82% hit rate. Although the improvements in the instructions per cycle (IPC) were moderate, our findings emphasize the algorithm's potential to enhance cache utilization and reduce memory access times.
format Preprint
id arxiv_https___arxiv_org_abs_2502_02349
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Random Adaptive Cache Placement Policy
Ahire, Vrushank
Menon, Pranav
Muley, Aniruddh
Prasad, Abhinandan S.
Hardware Architecture
Distributed, Parallel, and Cluster Computing
Operating Systems
Performance
This paper presents a new hybrid cache replacement algorithm that combines random allocation with a modified V-Way cache implementation. Our RAC adapts to complex cache access patterns and optimizes cache usage by improving the utilization of cache sets, unlike traditional cache policies. The algorithm utilizes a 16-way set-associative cache with 2048 sets, incorporating dynamic allocation and flexible tag management. RAC extends the V-Way cache design and its variants by optimizing tag and data storage for enhanced efficiency. We evaluated the algorithm using the ChampSim simulator with four diverse benchmark traces and observed significant improvements in cache hit rates up to 80.82% hit rate. Although the improvements in the instructions per cycle (IPC) were moderate, our findings emphasize the algorithm's potential to enhance cache utilization and reduce memory access times.
title Random Adaptive Cache Placement Policy
topic Hardware Architecture
Distributed, Parallel, and Cluster Computing
Operating Systems
Performance
url https://arxiv.org/abs/2502.02349