Performance studies of the CE-65v2 MAPS prototype structure
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2025
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| author | Ilg, A. Lorenzetti, A. Baba, H. Baudot, J. Besson, A. Bugiel, S. Chujo, T. Colledani, C. Dorokhov, A. Bitar, Z. El Goffe, M. Gunji, T. Hu-Guo, C. Jaaskelainen, K. Katsuno, T. Kluge, A. Kostina, A. Kumar, A. Macchiolo, A. Mager, M. Park, J. Ploerer, E. Sakai, S. Senyukov, S. Shamas, H. Shibata, D. Snoeys, W. Stanek, P. Suljic, M. Tomasek, L. Valin, I. Wada, R. Yamaguchi, Y. |
| author_facet | Ilg, A. Lorenzetti, A. Baba, H. Baudot, J. Besson, A. Bugiel, S. Chujo, T. Colledani, C. Dorokhov, A. Bitar, Z. El Goffe, M. Gunji, T. Hu-Guo, C. Jaaskelainen, K. Katsuno, T. Kluge, A. Kostina, A. Kumar, A. Macchiolo, A. Mager, M. Park, J. Ploerer, E. Sakai, S. Senyukov, S. Shamas, H. Shibata, D. Snoeys, W. Stanek, P. Suljic, M. Tomasek, L. Valin, I. Wada, R. Yamaguchi, Y. |
| contents | With the next upgrade of the ALICE inner tracking system (ITS3) as its primary focus, a set of small MAPS test structures have been developed in the 65 nm TPSCo CMOS process. The CE-65 focuses on the characterisation of the analogue charge collection properties of this technology. The latest iteration, the CE-65v2, was produced in different processes (standard, with a low-dose n-type blanket, and blanket with gap between pixels), pixel pitches (15, 18, 22.5 $μ$m), and pixel arrangements (square or staggered). The comparatively large pixel array size of $48\times24$ pixels in CE-65v2 allows the uniformity of the pixel response to be studied, among other benefits.
The CE-65v2 chip was characterised in a test beam at the CERN SPS. A first analysis showed that hit efficiencies of $\geq 99\%$ and spatial resolution better than 5 $μ$m can be achieved for all pitches and process variants. For the standard process, thanks to larger charge sharing, even spatial resolutions below 3 $μ$m are reached, in line with vertex detector requirements for the FCC-ee.
This contribution further investigates the data collected at the SPS test beam. Thanks to the large sensor size and efficient data collection, a large amount of statistics was collected, which allows for detailed in-pixel studies to see the efficiency and spatial resolution as a function of the hit position within the pixels. Again, different pitches and process variants are compared. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2502_04070 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Performance studies of the CE-65v2 MAPS prototype structure Ilg, A. Lorenzetti, A. Baba, H. Baudot, J. Besson, A. Bugiel, S. Chujo, T. Colledani, C. Dorokhov, A. Bitar, Z. El Goffe, M. Gunji, T. Hu-Guo, C. Jaaskelainen, K. Katsuno, T. Kluge, A. Kostina, A. Kumar, A. Macchiolo, A. Mager, M. Park, J. Ploerer, E. Sakai, S. Senyukov, S. Shamas, H. Shibata, D. Snoeys, W. Stanek, P. Suljic, M. Tomasek, L. Valin, I. Wada, R. Yamaguchi, Y. Instrumentation and Detectors High Energy Physics - Experiment With the next upgrade of the ALICE inner tracking system (ITS3) as its primary focus, a set of small MAPS test structures have been developed in the 65 nm TPSCo CMOS process. The CE-65 focuses on the characterisation of the analogue charge collection properties of this technology. The latest iteration, the CE-65v2, was produced in different processes (standard, with a low-dose n-type blanket, and blanket with gap between pixels), pixel pitches (15, 18, 22.5 $μ$m), and pixel arrangements (square or staggered). The comparatively large pixel array size of $48\times24$ pixels in CE-65v2 allows the uniformity of the pixel response to be studied, among other benefits. The CE-65v2 chip was characterised in a test beam at the CERN SPS. A first analysis showed that hit efficiencies of $\geq 99\%$ and spatial resolution better than 5 $μ$m can be achieved for all pitches and process variants. For the standard process, thanks to larger charge sharing, even spatial resolutions below 3 $μ$m are reached, in line with vertex detector requirements for the FCC-ee. This contribution further investigates the data collected at the SPS test beam. Thanks to the large sensor size and efficient data collection, a large amount of statistics was collected, which allows for detailed in-pixel studies to see the efficiency and spatial resolution as a function of the hit position within the pixels. Again, different pitches and process variants are compared. |
| title | Performance studies of the CE-65v2 MAPS prototype structure |
| topic | Instrumentation and Detectors High Energy Physics - Experiment |
| url | https://arxiv.org/abs/2502.04070 |