APA (7th ed.) Citation

Nath, S. K. D., & Tan, B. (2025). Toward Automated Potential Primary Asset Identification in Verilog Designs.

Chicago Style (17th ed.) Citation

Nath, Subroto Kumer Deb, and Benjamin Tan. Toward Automated Potential Primary Asset Identification in Verilog Designs. 2025.

MLA (9th ed.) Citation

Nath, Subroto Kumer Deb, and Benjamin Tan. Toward Automated Potential Primary Asset Identification in Verilog Designs. 2025.

Warning: These citations may not always be 100% accurate.