Wu, J. (2025). An Arbitrary Time Interval Generator Base on Vernier Clocks with 0.67 ps Adjustable Steps Implemented in FPGA.
Chicago Style (17th ed.) CitationWu, Jin-yuan. An Arbitrary Time Interval Generator Base on Vernier Clocks with 0.67 Ps Adjustable Steps Implemented in FPGA. 2025.
MLA (9th ed.) CitationWu, Jin-yuan. An Arbitrary Time Interval Generator Base on Vernier Clocks with 0.67 Ps Adjustable Steps Implemented in FPGA. 2025.
Warning: These citations may not always be 100% accurate.