Runtime Tunable Tsetlin Machines for Edge Inference on eFPGAs
Fuente:
arXiv
Guardado en:
| Autores principales: | Rahman, Tousif, Mao, Gang, Pattison, Bob, Maheshwari, Sidharth, Sartori, Marcos, Wheeldon, Adrian, Shafik, Rishad, Yakovlev, Alex |
|---|---|
| Formato: | Preprint |
| Publicado: |
2025
|
| Materias: | |
| Acceso en línea: | |
| Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
Ejemplares similares
Dynamic Tsetlin Machine Accelerators for On-Chip Training at the Edge using FPGAs
por: Mao, Gang, et al.
Publicado: (2025)
por: Mao, Gang, et al.
Publicado: (2025)
MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications
por: Rahman, Tousif, et al.
Publicado: (2024)
por: Rahman, Tousif, et al.
Publicado: (2024)
TsetlinWiSARD: On-Chip Training of Weightless Neural Networks using Tsetlin Automata on FPGAs
por: Duan, Shengyu, et al.
Publicado: (2026)
por: Duan, Shengyu, et al.
Publicado: (2026)
IMPACT:InMemory ComPuting Architecture Based on Y-FlAsh Technology for Coalesced Tsetlin Machine Inference
por: Ghazal, Omar, et al.
Publicado: (2024)
por: Ghazal, Omar, et al.
Publicado: (2024)
Efficient FPGA Implementation of Time-Domain Popcount for Low-Complexity Machine Learning
por: Duan, Shengyu, et al.
Publicado: (2025)
por: Duan, Shengyu, et al.
Publicado: (2025)
An All-digital 8.6-nJ/Frame 65-nm Tsetlin Machine Image Classification Accelerator
por: Tunheim, Svein Anders, et al.
Publicado: (2025)
por: Tunheim, Svein Anders, et al.
Publicado: (2025)
Event-Driven Digital-Time-Domain Inference Architectures for Tsetlin Machines
por: Lan, Tian, et al.
Publicado: (2025)
por: Lan, Tian, et al.
Publicado: (2025)
ETHEREAL: Energy-efficient and High-throughput Inference using Compressed Tsetlin Machine
por: Duan, Shengyu, et al.
Publicado: (2025)
por: Duan, Shengyu, et al.
Publicado: (2025)
TsetlinKWS: A 65nm 16.58uW, 0.63mm2 State-Driven Convolutional Tsetlin Machine-Based Accelerator For Keyword Spotting
por: Lin, Baizhou, et al.
Publicado: (2025)
por: Lin, Baizhou, et al.
Publicado: (2025)
Fast and Compact Tsetlin Machine Inference on CPUs Using Instruction-Level Optimization
por: Zeng, Yefan, et al.
Publicado: (2025)
por: Zeng, Yefan, et al.
Publicado: (2025)
In-Memory Learning Automata Architecture using Y-Flash Cell
por: Ghazal, Omar, et al.
Publicado: (2024)
por: Ghazal, Omar, et al.
Publicado: (2024)
A Tsetlin Machine Image Classification Accelerator on a Flexible Substrate
por: Qin, Yushu, et al.
Publicado: (2025)
por: Qin, Yushu, et al.
Publicado: (2025)
REDACTOR: eFPGA Redaction for DNN Accelerator Security
por: Baddour, Yazan, et al.
Publicado: (2025)
por: Baddour, Yazan, et al.
Publicado: (2025)
A Runtime-Adaptive Transformer Neural Network Accelerator on FPGAs
por: Kabir, Ehsan, et al.
Publicado: (2024)
por: Kabir, Ehsan, et al.
Publicado: (2024)
PD-Swap: Prefill-Decode Logic Swapping for End-to-End LLM Inference on Edge FPGAs via Dynamic Partial Reconfiguration
por: Zhang, Yifan, et al.
Publicado: (2025)
por: Zhang, Yifan, et al.
Publicado: (2025)
DPUConfig: Optimizing ML Inference in FPGAs Using Reinforcement Learning
por: Patras, Alexandros, et al.
Publicado: (2026)
por: Patras, Alexandros, et al.
Publicado: (2026)
Design and Implementation of Washing Machine HUD Using FPGAs
por: Stites, Norman, et al.
Publicado: (2025)
por: Stites, Norman, et al.
Publicado: (2025)
ONNX-to-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs
por: Manca, Federico, et al.
Publicado: (2024)
por: Manca, Federico, et al.
Publicado: (2024)
Views: a hardware-friendly graph database model for storing semantic information
por: Yang, Yanjun, et al.
Publicado: (2025)
por: Yang, Yanjun, et al.
Publicado: (2025)
NuRedact: Non-Uniform eFPGA Architecture for Low-Overhead and Secure IP Redaction
por: Das, Voktho, et al.
Publicado: (2026)
por: Das, Voktho, et al.
Publicado: (2026)
Data-Rate-Aware High-Speed CNN Inference on FPGAs
por: Habermann, Tobias, et al.
Publicado: (2026)
por: Habermann, Tobias, et al.
Publicado: (2026)
ECOLogic: Enabling Circular, Obfuscated, and Adaptive Logic via eFPGA-Augmented SoCs
por: Tashdid, Ishraq, et al.
Publicado: (2025)
por: Tashdid, Ishraq, et al.
Publicado: (2025)
Uncertainty Quantification in the Tsetlin Machine
por: Helin, Runar, et al.
Publicado: (2025)
por: Helin, Runar, et al.
Publicado: (2025)
TeLLMe: An Energy-Efficient Ternary LLM Accelerator for Prefilling and Decoding on Edge FPGAs
por: Qiao, Ye, et al.
Publicado: (2025)
por: Qiao, Ye, et al.
Publicado: (2025)
Wavelet Based Frequency Detection Using FPGAs
por: Hill, Caleb, et al.
Publicado: (2024)
por: Hill, Caleb, et al.
Publicado: (2024)
H2PIPE: High throughput CNN Inference on FPGAs with High-Bandwidth Memory
por: Doumet, Mario, et al.
Publicado: (2024)
por: Doumet, Mario, et al.
Publicado: (2024)
LUT-LLM: Efficient Large Language Model Inference with Memory-based Computations on FPGAs
por: He, Zifan, et al.
Publicado: (2025)
por: He, Zifan, et al.
Publicado: (2025)
Real-Time Object Detection and Classification using YOLO for Edge FPGAs
por: Amin, Rashed Al, et al.
Publicado: (2025)
por: Amin, Rashed Al, et al.
Publicado: (2025)
Duet: Creating Harmony between Processors and Embedded FPGAs
por: Li, Ang, et al.
Publicado: (2023)
por: Li, Ang, et al.
Publicado: (2023)
Studying the Degradation of Propagation Delay on FPGAs at the European XFEL
por: Lanzieri, Leandro, et al.
Publicado: (2024)
por: Lanzieri, Leandro, et al.
Publicado: (2024)
Interconnect-Aware Logic Resynthesis for Multi-Die FPGAs
por: Wang, Xiaoke, et al.
Publicado: (2026)
por: Wang, Xiaoke, et al.
Publicado: (2026)
FlightLLM: Efficient Large Language Model Inference with a Complete Mapping Flow on FPGAs
por: Zeng, Shulin, et al.
Publicado: (2024)
por: Zeng, Shulin, et al.
Publicado: (2024)
RidgeWalker: Perfectly Pipelined Graph Random Walks on FPGAs
por: Tan, Hongshi, et al.
Publicado: (2026)
por: Tan, Hongshi, et al.
Publicado: (2026)
Fast Generation of Custom Floating-Point Spatial Filters on FPGAs
por: Campos, Nelson, et al.
Publicado: (2024)
por: Campos, Nelson, et al.
Publicado: (2024)
smallNet: Implementation of a convolutional layer in tiny FPGAs
por: Bascuñán, Fernanda Zapata, et al.
Publicado: (2025)
por: Bascuñán, Fernanda Zapata, et al.
Publicado: (2025)
GreenFPGA: Evaluating FPGAs as Environmentally Sustainable Computing Solutions
por: Sudarshan, Chetan Choppali, et al.
Publicado: (2023)
por: Sudarshan, Chetan Choppali, et al.
Publicado: (2023)
Small Logic-based Multipliers with Incomplete Sub-Multipliers for FPGAs
por: Böttcher, Andreas, et al.
Publicado: (2024)
por: Böttcher, Andreas, et al.
Publicado: (2024)
Lightweight Congruence Profiling for Early Design Exploration of Heterogeneous FPGAs
por: Boston, Allen, et al.
Publicado: (2025)
por: Boston, Allen, et al.
Publicado: (2025)
Accelerating Boolean Constraint Propagation for Efficient SAT-Solving on FPGAs
por: Govindasamy, Hariprasadh, et al.
Publicado: (2024)
por: Govindasamy, Hariprasadh, et al.
Publicado: (2024)
Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs
por: Taka, Endri, et al.
Publicado: (2024)
por: Taka, Endri, et al.
Publicado: (2024)
Ejemplares similares
-
Dynamic Tsetlin Machine Accelerators for On-Chip Training at the Edge using FPGAs
por: Mao, Gang, et al.
Publicado: (2025) -
MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications
por: Rahman, Tousif, et al.
Publicado: (2024) -
TsetlinWiSARD: On-Chip Training of Weightless Neural Networks using Tsetlin Automata on FPGAs
por: Duan, Shengyu, et al.
Publicado: (2026) -
IMPACT:InMemory ComPuting Architecture Based on Y-FlAsh Technology for Coalesced Tsetlin Machine Inference
por: Ghazal, Omar, et al.
Publicado: (2024) -
Efficient FPGA Implementation of Time-Domain Popcount for Low-Complexity Machine Learning
por: Duan, Shengyu, et al.
Publicado: (2025)