:: Library Catalog

Cover Image

Saved in:

Bibliographic Details
Main Authors:	Attari, Mohammad, Edfors, Ove, Liu, Liang
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	https://arxiv.org/abs/2502.09785
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Efficient Implementation of an Adaptive Transformer Accelerator for Massive MIMO Outdoor Localization
by: Yaman, Ilayda, et al.
Published: (2026)

Low-latency D-MIMO Localization using Distributed Scalable Message-Passing Algorithm
by: Iancu, Dumitra, et al.
Published: (2025)

Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications
by: Leon, Vasileios, et al.
Published: (2025)

Closing the Gap Between Float and Posit Hardware Efficiency
by: Jonnalagadda, Aditya Anirudh, et al.
Published: (2026)

A Hybrid-Domain Floating-Point Compute-in-Memory Architecture for Efficient Acceleration of High-Precision Deep Neural Networks
by: Yi, Zhiqiang, et al.
Published: (2025)

BBAL: A Bidirectional Block Floating Point-Based Quantisation Accelerator for Large Language Models
by: Han, Xiaomeng, et al.
Published: (2025)

H-FA: A Hybrid Floating-Point and Logarithmic Approach to Hardware Accelerated FlashAttention
by: Alexandridis, Kosmas, et al.
Published: (2025)

MXFormer: A Microscaling Floating-Point Charge-Trap Transistor Compute-in-Memory Transformer Accelerator
by: Karfakis, George, et al.
Published: (2026)

The AetherFloat Family: Block-Scale-Free Quad-Radix Floating-Point Architectures for AI Accelerators
by: Morisaki, Keita
Published: (2026)

TimeFloats: Train-in-Memory with Time-Domain Floating-Point Scalar Products
by: Hashem, Maeesha Binte, et al.
Published: (2024)

From Quarter to All: Accelerating Speculative LLM Decoding via Floating-Point Exponent Remapping and Parameter Sharing
by: Zhao, Yushu, et al.
Published: (2025)

Splitting Precoding with Subspace Selection and Quantized Refinement for Massive MIMO
by: Khorsandmanesh, Yasaman, et al.
Published: (2026)

FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators
by: Isachi, Victor, et al.
Published: (2025)

Fast Generation of Custom Floating-Point Spatial Filters on FPGAs
by: Campos, Nelson, et al.
Published: (2024)

Online Alignment and Addition in Multi-Term Floating-Point Adders
by: Alexandridis, Kosmas, et al.
Published: (2024)

Floating Point HUB Adder for RISC-V Sargantana Processor
by: Bandera, Gerardo, et al.
Published: (2024)

A 46 Gbps 12 pJ/b Sparsity-Adaptive Beamspace Equalizer for mmWave Massive MIMO in 22FDX
by: Mirfarshbafan, Seyed Hadi, et al.
Published: (2024)

CAMASim: A Comprehensive Simulation Framework for Content-Addressable Memory based Accelerators
by: Li, Mengyuan, et al.
Published: (2024)

SafeCiM: Investigating Resilience of Hybrid Floating-Point Compute-in-Memory Deep Learning Accelerators
by: Bhattacharya, Swastik, et al.
Published: (2025)

Floating-Point Multiply-Add with Approximate Normalization for Low-Cost Matrix Engines
by: Alexandridis, Kosmas, et al.
Published: (2024)

Converting Binary Floating-Point Numbers to Shortest Decimal Strings: An Experimental Review
by: Gareau, Jaël Champagne, et al.
Published: (2026)

Low-rank Preconditioning in Beamspace Domain For Massive MU-MIMO Long-Term Beamforming
by: Kiani, Amirreza, et al.
Published: (2026)

Interference Suppression for Massive MU-MIMO Long-Term Beamforming with Matrix Inversion Approximation
by: Kiani, Amirreza, et al.
Published: (2026)

ARAS: An Adaptive Low-Cost ReRAM-Based Accelerator for DNNs
by: Sabri, Mohammad, et al.
Published: (2024)

Hamun: An Approximate Computation Method to Prolong the Lifespan of ReRAM-Based Accelerators
by: Sabri, Mohammad, et al.
Published: (2025)

A Stochastic Rounding-Enabled Low-Precision Floating-Point MAC for DNN Training
by: Ali, Sami Ben, et al.
Published: (2024)

Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures
by: Zuckerman, Joseph, et al.
Published: (2024)

A Novel Cost-Effective MIMO Architecture with Ray Antenna Array for Enhanced Wireless Communication Performance
by: Dong, Zhenjun, et al.
Published: (2025)

MatrixFlow: System-Accelerator co-design for high-performance transformer applications
by: Liu, Qunyou, et al.
Published: (2025)

Mitigating the Bandwidth Wall via Data-Streaming System-Accelerator Co-Design
by: Liu, Qunyou, et al.
Published: (2026)

Low-Complexity Beamspace Channel Denoiser for mmWave Massive MIMO with Low-Resolution ADCs
by: Park, Hanyoung, et al.
Published: (2026)

Communication Characterization of AI Workloads for Large-scale Multi-chiplet Accelerators
by: Musavi, Mariam, et al.
Published: (2024)

MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products
by: İslamoğlu, Gamze, et al.
Published: (2025)

E2AFS: Energy-Efficient Approximate Floating Point Square Rooter for Error Tolerant Computing
by: Goyal, Prateek, et al.
Published: (2026)

A Hybrid Residue Floating Numerical Architecture with Formal Error Bounds for High Throughput FPGA Computation
by: Darvishi, Mostafa
Published: (2026)

STRELA: STReaming ELAstic CGRA Accelerator for Embedded Systems
by: Vazquez, Daniel, et al.
Published: (2024)

Resilient and Secure Programmable System-on-Chip Accelerator Offload
by: Gouveia, Inês Pinto, et al.
Published: (2024)

Dual-Issue Execution of Mixed Integer and Floating-Point Workloads on Energy-Efficient In-Order RISC-V Cores
by: Colagrande, Luca, et al.
Published: (2025)

DRACO: Co-design for DSP-Efficient Rigid Body Dynamics Accelerator
by: Liu, Xingyu, et al.
Published: (2025)

Exploring and Exploiting Runtime Reconfigurable Floating Point Precision in Scientific Computing: a Case Study for Solving PDEs
by: Hao, Cong "Callie"
Published: (2024)